Paulo Zanoni a099d6ae4d intel: add devinfo->has_64bit_float_via_math_pipe ... Unusual hardware features that require special hanlding usually get a devinfo field, so do this for MTL's unordered DF types. This will guarantee that any platform based on MTL (thus inheriting from MTL_FEATURES) will automatically be handled in these special cases. v2: s/has_unordered_64bit_float/has_64bit_float_via_math_pipe/ (Curro). Reviewed-by: Francisco Jerez <currojerez@riseup.net> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20072>		2022-12-10 03:59:19 +00:00
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blorp	intel/compiler: Delete key->msaa_16	2022-12-09 10:18:25 +00:00
ci	ci: Add intel kbl xfail to flake	2022-11-30 17:24:03 +00:00
common	intel/common: use format struct in aux mapping	2022-12-09 09:49:42 +00:00
compiler	intel: add devinfo->has_64bit_float_via_math_pipe	2022-12-10 03:59:19 +00:00
dev	intel: add devinfo->has_64bit_float_via_math_pipe	2022-12-10 03:59:19 +00:00
ds	meson: do not use source_root() when possible	2022-11-22 06:11:07 +00:00
genxml	intel/genxml: Add genX_rt_pack.h	2022-12-09 01:43:39 +00:00
isl	isl: don't report I915_FORMAT_MOD_Y_TILED_CCS on Gfx8	2022-12-02 09:18:16 +00:00
nullhw-layer	utils: Merge util/debug.* into util/u_debug.* and remove util/debug.*	2022-11-02 07:25:39 +00:00
perf	intel: add MTL performance metrics	2022-12-09 09:13:02 +00:00
tools	intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument	2022-11-23 16:57:23 +00:00
vulkan	Revert "anv: compile anv_acceleration_structure.c"	2022-12-10 01:16:16 +00:00
vulkan_hasvk	hasvk: Delete VK_KHR_device_group provided entrypoints	2022-12-09 14:07:59 -06:00
meson.build	intel: Disable SSE2 instruction set if building for non x86 architectures	2022-11-23 16:57:23 +00:00