Ian Romanick 430d1a20eb spirv: Fix array length of buffers larger than INT32_MAX. ... Like 90a8fb0355. fossil-db results: All Skylake and newer Intel platforms had similar results. (Ice Lake shown) Instructions in all programs: 141442369 -> 141442363 (-0.0%) Instructions helped: 1 Cycles in all programs: 9099270231 -> 9099270187 (-0.0%) Cycles helped: 1 Reviewed-by: Emma Anholt <emma@anholt.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17637>		2022-07-22 17:54:28 +00:00
..
clc	clc: add new feature options for intel_clc	2022-06-27 15:31:49 +00:00
glsl	glsl: correctly track cross slot component packing	2022-07-22 10:43:18 +00:00
isaspec	isaspec: Handle patterns bigger then 64 bit	2022-06-14 12:35:39 +00:00
nir	nir: Split usub_sat lowering flag from uadd_sat.	2022-07-22 17:54:28 +00:00
spirv	spirv: Fix array length of buffers larger than INT32_MAX.	2022-07-22 17:54:28 +00:00
builtin_type_macros.h	glsl: add vec5 glsl types	2022-01-18 16:10:35 +08:00
glsl_types.cpp	compiler/types: Don't place members in the previous substruct's end padding	2022-06-09 22:55:37 +00:00
glsl_types.h	compiler/types: Add a texture type	2021-10-16 05:49:34 +00:00
meson.build	spirv: Use a single binary for gtests	2021-10-20 17:55:36 +00:00
nir_gl_types.h	nir: remove gl.h include from nir headers.	2022-01-19 21:54:58 +00:00
nir_types.cpp	nir/types: fix glsl_matrix_type_is_row_major() assert	2022-06-30 00:41:46 +00:00
nir_types.h	nir/glsl: wrap component_slots_aligned()	2022-05-16 03:33:18 +00:00
shader_enums.c	nir+ir3: Rename load_size_ir3 to load_center_rhw_ir3.	2022-07-11 16:56:05 +00:00
shader_enums.h	nir+ir3: Rename load_size_ir3 to load_center_rhw_ir3.	2022-07-11 16:56:05 +00:00
shader_info.h	shader_info: Move subgroup_size out of cs and make it an enum	2022-07-08 22:47:22 +00:00