mesa/src/amd
Jesse Natalie d3faac7a15 nir: Add options to nir_lower_compute_system_values to control compute ID base lowering
If no options are provided, existing intrinsics are used.
If the lowering pass indicates there should be offsets used for global
invocation ID or work group ID, then those instructions are lowered to
include the offset.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
2020-08-21 22:07:05 +00:00
..
addrlib amd: add support for Navy Flounder 2020-07-28 19:47:10 +00:00
common ac/gpu_info: set num_tiles_pipes on gfx10+ too 2020-08-07 11:22:21 -04:00
compiler nir: rename nir_op_fne to nir_op_fneu 2020-08-21 17:26:21 +00:00
llvm nir: rename nir_op_fne to nir_op_fneu 2020-08-21 17:26:21 +00:00
registers ac: add tables for CP register shadowing 2020-07-22 12:08:19 -04:00
vulkan nir: Add options to nir_lower_compute_system_values to control compute ID base lowering 2020-08-21 22:07:05 +00:00
Android.addrlib.mk android: amd/addrlib: add gfx10 support 2019-07-10 09:03:55 +02:00
Android.common.mk radeonsi: Define gfx10_format in the common header. 2020-06-03 00:17:00 +00:00
Android.compiler.mk android: aco: fix PIPE_FORMAT related building errors 2020-03-04 22:25:36 +01:00
Android.mk android: aco: add support for libmesa_aco 2019-09-28 15:56:34 +02:00
Makefile.sources ac: add tables for CP register shadowing 2020-07-22 12:08:19 -04:00
meson.build aco: add framework for unit testing 2020-07-30 16:13:08 +00:00