mesa/src
Lucas Stach 9df635844c etnaviv: support tile aligned RS blits
The RS can blit abitrary tile aligned subregions of a resource by
adjusting the buffer offset.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-By: Wladimir J. van der Laan <laanwj@gmail.com>
2017-09-28 17:40:49 +02:00
..
amd radv: add an assertion in radv_BeginCommandBuffer() 2017-09-28 13:20:14 +01:00
broadcom broadcom/genxml: Set up enums for VC5 blending, depth, stencil, and prims. 2017-09-19 10:40:55 -07:00
compiler meson: Add build Intel "anv" vulkan driver 2017-09-27 09:12:19 -07:00
egl meson: Add build Intel "anv" vulkan driver 2017-09-27 09:12:19 -07:00
gallium etnaviv: support tile aligned RS blits 2017-09-28 17:40:49 +02:00
gbm configure.ac: split the wayland client/server confusion 2017-09-19 19:02:34 +01:00
getopt
glx glx: Be more tolerant in glXImportContext (v2) 2017-09-27 10:11:37 -04:00
gtest meson: Add build Intel "anv" vulkan driver 2017-09-27 09:12:19 -07:00
hgl
intel anv: add an assertion in genX(BeginCommandBuffer) 2017-09-28 13:20:14 +01:00
loader loader/dri3: Make sure we invalidate a drawable on size change 2017-09-07 12:43:29 +02:00
mapi meson: Add build Intel "anv" vulkan driver 2017-09-27 09:12:19 -07:00
mesa i965: enable up to 32 inputs for geometry shaders in gen8+ 2017-09-28 12:36:32 +02:00
util meson: Add build Intel "anv" vulkan driver 2017-09-27 09:12:19 -07:00
vulkan meson: Add build Intel "anv" vulkan driver 2017-09-27 09:12:19 -07:00
Makefile.am automake: adjust wayland-drm comment 2017-09-19 19:02:34 +01:00
meson.build meson: build "radv" vulkan driver for radeon hardware 2017-09-27 09:12:34 -07:00
SConscript scons: use python3-compatible print() 2017-09-25 11:57:12 +01:00