mesa/src
Kenneth Graunke 9d8f2c4421 intel/brw: Rework BRW_REGISTER_TYPE's representation semantics
In ancient days, we directly used the hardware register type encodings
throughout the compiler.  As more GPU generations came out, encodings
shifted, and we moved to an abstract enum that we could encode/decode
to a particular GPU's hardware encoding.  But there was no particular
meaning behind any particular value.

One downside to this approach is that we end up with switch statements
galore.  Want to know a type's size?  Switch.  Convert a unsigned type
to a signed one?  Switch.  Get a type with the same base type, but
different bit size?  Switch.  This is both inefficient and inconvenient.

In contrast, nir_alu_type takes a nicer approach - the type encoding has
certain bits representing the base type, and others encoding the size of
the type.  Switching base types or sizes is a simple matter of masking
out the relevant field and substituting a different one.

Tigerlake's encoding adopts a similar approach: two bits represent the
size as a 2-bit unsigned number n, where the bit size is (8 * 2^n).
Two more bits represent the base type.  Past encodings were a bit ad hoc
as new data types were added over time, but Gfx12 is organized (mostly).

This patch converts our brw_reg_type enum over to a new system that's
patterned after the Tigerlake style (for easy conversion) while
deviating in a few ways that make our vector immediate type size
handling simpler.  Should we add additional base types, we're likely
to continue deviating.  Still, converting is much simpler.

Type size calculations (which are performed all the time) are now a
simple mask and shift, instead of a switch.

We also adopt the name BRW_TYPE_* instead of BRW_REGISTER_TYPE_* because
it's much shorter and easier to type.  Similarly, we create new helper
functions named brw_type_* for working with these types, with a cleaner
naming convention.  Legacy names still exist but will we dropped over
the next few patches as pieces get cleaned up.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28847>
2024-04-25 11:41:48 +00:00
..
amd radv: Trace indirect dispatch sizes 2024-04-25 10:20:03 +00:00
android_stub
asahi nir: remove global_invocation_id_zero_base 2024-04-24 20:18:49 +00:00
broadcom nir: remove workgroup_id_zero_base 2024-04-24 20:18:49 +00:00
c11
compiler nir: document base_global_invocation_id and base_workgroup_id 2024-04-24 20:18:49 +00:00
drm-shim drm-shim: Add io region handling in mmap 2024-03-19 10:22:34 +00:00
egl dri: plumb a 'implicit' param through createNewScreen interfaces 2024-04-22 23:25:58 +00:00
etnaviv etnaviv: hwdb: Add VIP_V7 and NN_XYDP0 feature bits 2024-04-24 15:26:37 +00:00
freedreno nir: remove workgroup_id_zero_base 2024-04-24 20:18:49 +00:00
gallium ac/debug,radv: Read UMR wave dumps into memory before parsing 2024-04-25 10:20:03 +00:00
gbm gbm: plumb an 'implicit' param through device creation 2024-04-22 23:25:58 +00:00
getopt
glx glx: silence more implicit-load zink errors 2024-04-22 23:25:58 +00:00
gtest
imagination meson: add VK_DRIVER_FILES to devenv, alongside the old VK_ICD_FILENAMES 2024-04-02 18:08:52 +00:00
imgui
intel intel/brw: Rework BRW_REGISTER_TYPE's representation semantics 2024-04-25 11:41:48 +00:00
loader loader/wayland: Add named queue fallback 2024-02-28 11:01:31 +00:00
mapi treewide: Replace usage of macro DEBUG with MESA_DEBUG when possible 2024-03-22 18:22:34 +00:00
mesa mesa/st: lower base invoc and workgroup id 2024-04-24 20:18:49 +00:00
microsoft nir: remove workgroup_id_zero_base 2024-04-24 20:18:49 +00:00
nouveau nak: Pass has_mod to all form of src2 requiring it 2024-04-25 11:19:00 +00:00
panfrost nir: remove global_invocation_id_zero_base 2024-04-24 20:18:49 +00:00
tool pps: Config tweaks to avoid loosing traces 2024-03-25 19:49:50 +00:00
util util: import pipe_box and its helpers 2024-04-22 01:42:52 +00:00
virtio venus: extend image cache to vkGetDeviceImageMemoryRequirements 2024-04-25 02:48:50 +00:00
vulkan vulkan: pass cmdbuf level to vk_command_buffer_ops::create() 2024-04-23 06:33:31 +00:00
.clang-format agx: add Braun-Hack spiller pass 2024-03-30 00:26:18 +00:00
meson.build loader/wayland: Add fallback wl_display_dispatch_queue_timeout 2024-02-27 13:10:13 +00:00