Georg Lehmann 9d1efae314 aco/gfx11: fix get_gfx11_true16_mask with v_cmp_class_f16 ... The second operand is 16bit, so the we need to use VOP3 to address v128-v255. Closes: #9413 Fixes: 6872f8d861 ("aco/gfx11: allow true 16-bit instructions to access v128+") Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24294> (cherry picked from commit 8fbebb6a2a)		2023-08-31 11:02:08 -07:00
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addrlib	amd/addrlib: add ADDR_FMT_BG_RG_16_16_16_16	2023-06-01 17:59:39 +00:00
ci	ci: disable Material Testers.x86_64_2020.04.08_13.38_frame799.rdc trace	2023-08-30 10:04:12 -07:00
common	ac/nir: always round cube array layers	2023-07-28 10:46:33 -07:00
compiler	aco/gfx11: fix get_gfx11_true16_mask with v_cmp_class_f16	2023-08-31 11:02:08 -07:00
drm-shim	amd/drm-shim: use fixed-width types	2023-06-23 18:35:52 +00:00
llvm	ac/llvm: skip ballot zext for 32-bit dest with wave32-as-wave64	2023-07-28 10:46:33 -07:00
registers	ac,radeonsi,winsyses: switch to SPDX-License-Identifier: MIT	2023-05-24 21:48:19 +00:00
vulkan	radv: add conformant_trunc_coord to cache UUID	2023-07-28 10:46:33 -07:00
meson.build	meson: build radeonsi with aco	2023-05-15 02:01:10 +00:00