José Roberto de Souza bb31287d24 intel: Initialize upper 32bits of drm_xe_sync.handle ... Some compiles don't initialize the upper 32bits of the union that has u64 addr and u32 handle. Similar to previous patches but doing that for code in intel/misc. Cc: stable Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Signed-off-by: Juston Li <justonli@google.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33172>		2025-02-02 21:34:45 -08:00
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examples	intel/executor: Add example using scalar register and send gather	2024-12-13 02:18:15 +00:00
executor.h	intel/executor: Enable PTL	2024-11-22 10:26:12 -08:00
executor_genx.c	intel: Switch to COMPUTE_WALKER_BODY	2024-10-29 15:54:43 +00:00
executor_genx.h
executor_macros.c	intel/executor: Enable PTL	2024-11-22 10:26:12 -08:00
executor_main.c	intel: Initialize upper 32bits of drm_xe_sync.handle	2025-02-02 21:34:45 -08:00
meson.build	intel/executor: Enable PTL	2024-11-22 10:26:12 -08:00