Samuel Pitoiset 9a5016d54d radv/rt: use radv_pipeline_hash_shader_stage() ... It should be equivalent. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28711>		2024-04-15 08:49:21 +00:00
..
addrlib	amd: fix addrlib regression	2024-03-22 08:25:21 +00:00
ci	radv: stop ignoring shader stages that don't need to be imported with GPL	2024-04-12 06:24:43 +00:00
common	nir: change "user_data_amd" sysval from 4 to 8 components	2024-04-13 16:45:08 +00:00
compiler	aco: remove occupancy check in dealloc_vgprs()	2024-04-11 18:30:47 +00:00
drm-shim	amd: Use align64 instead of ALIGN for 64 bit value parameter	2024-01-03 22:02:17 +00:00
llvm	nir: add nir_intrinsic_optimization_barrier_sgpr_amd	2024-04-13 16:45:08 +00:00
registers	amd/registers: add correct gfx11.x enums for BINNING_MODE	2024-03-11 23:36:55 +00:00
vpelib	radeonsi/vpe: support vpe 1.1	2024-03-25 00:59:02 +00:00
vulkan	radv/rt: use radv_pipeline_hash_shader_stage()	2024-04-15 08:49:21 +00:00
meson.build	amd,radeonsi: add libvpe	2023-12-01 00:23:38 +00:00