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mesa/src/freedreno/ir3
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Jason Ekstrand 9750164c09 nir: Rename get_buffer_size to get_ssbo_size 
This makes it explicit that this intrinsic is only for SSBOs.  For the
v3dv driver, we'll be adding a get_ubo_size intrinsic and we want to be
able to distinguish between the two.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6812>
2020-09-22 13:34:12 +00:00
..
tests freedreno: deduplicate a3xx+ disasm 2020-07-28 09:45:08 +00:00
disasm-a3xx.c freedreno/ir3: Fix assertion failures dumping CS high full regs. 2020-08-19 16:56:14 +00:00
instr-a3xx.h freedreno: deduplicate a3xx+ disasm 2020-07-28 09:45:08 +00:00
ir3.c freedreno/ir3: add tracking for # of instructions per category 2020-08-11 01:12:18 +00:00
ir3.h freedreno/ir3: add tracking for # of instructions per category 2020-08-11 01:12:18 +00:00
ir3_a4xx.c freedreno/ir3: add accessor for const_state 2020-06-19 13:16:57 +00:00
ir3_a6xx.c freedreno/ir3: fix resinfo wrmask 2020-06-28 16:32:08 +00:00
ir3_assembler.c ir3: Include ir3_compiler from ir3_shader 2020-06-26 09:34:33 +00:00
ir3_assembler.h freedreno/ir3: refactor out helper to compile shader from asm 2020-06-19 13:16:57 +00:00
ir3_cf.c freedreno/ir3: add helpers to deal with src/dst types 2020-05-19 16:06:17 +00:00
ir3_compiler.c freedreno/ir3: Clean up instrlen setup. 2020-08-05 23:06:55 +00:00
ir3_compiler.h freedreno/ir3: Clean up instrlen setup. 2020-08-05 23:06:55 +00:00
ir3_compiler_nir.c nir: Rename get_buffer_size to get_ssbo_size 2020-09-22 13:34:12 +00:00
ir3_context.c freedreno/ir3: improve handling of aliased inputs 2020-09-01 15:10:47 +00:00
ir3_context.h ir3: Add support for gl_ViewIndex in VS & FS 2020-08-20 19:21:17 +00:00
ir3_cp.c freedreno/ir3: Simpify the immediates from an array of vec4 to array of dwords. 2020-08-05 23:06:55 +00:00
ir3_cp_postsched.c freedreno/ir3: add post-scheduler cp pass 2020-06-16 20:56:15 +00:00
ir3_dce.c freedreno/ir3: DCE unused arrays 2020-07-14 23:26:15 +00:00
ir3_delay.c freedreno/ir3/delay: calculate delay properly for (rptN)'d instructions 2020-06-16 20:56:15 +00:00
ir3_disk_cache.c freedreno/ir3: disk-cache support 2020-06-26 08:55:19 -07:00
ir3_group.c freedreno/ir3: add helpers to move instructions 2020-06-16 20:56:15 +00:00
ir3_image.c freedreno/ir3: Refactor out IBO source references. 2020-05-26 18:17:46 +00:00
ir3_image.h freedreno/ir3: Refactor out IBO source references. 2020-05-26 18:17:46 +00:00
ir3_legalize.c freedreno/ir3: Fix duplicated fine derivatives instructions. 2020-07-18 00:43:44 +00:00
ir3_lexer.l freedreno/ir3/parser: half-precision relative regs 2020-07-18 09:14:13 -07:00
ir3_nir.c nir: Rename get_buffer_size to get_ssbo_size 2020-09-22 13:34:12 +00:00
ir3_nir.h freedreno/ir3: add support for a650 tess shared storage 2020-07-08 02:30:23 +00:00
ir3_nir_analyze_ubo_ranges.c freedreno/ir3: Apply the max upload limit to initial range setup 2020-09-08 18:20:51 +00:00
ir3_nir_imul.py freedreno/ir3: add rule to generate imad24 2019-10-18 15:08:54 -07:00
ir3_nir_lower_io_offsets.c freedreno/ir3: Replace our custom vec4 UBO intrinsic with the shared lowering. 2020-08-24 09:53:36 -07:00
ir3_nir_lower_load_barycentric_at_offset.c freedreno/ir3: don't rely on intr->num_components 2020-06-16 02:48:18 +00:00
ir3_nir_lower_load_barycentric_at_sample.c freedreno/ir3: don't rely on intr->num_components 2020-06-16 02:48:18 +00:00
ir3_nir_lower_tess.c nir: Use a single list for all shader variables 2020-07-29 17:38:58 +00:00
ir3_nir_lower_tex_prefetch.c freedreno/ir3: respect tex prefetch limits 2020-06-11 21:59:54 +00:00
ir3_nir_lower_tg4_to_tex.c freedreno: Convert nir_lower_tg4_to_tex to the NIR lowering helper. 2019-07-18 11:28:56 -07:00
ir3_nir_move_varying_inputs.c freedreno/ir3: fix ir3_nir_move_varying_inputs 2020-06-14 17:53:47 +00:00
ir3_nir_trig.py freedreno/ir3: Disable sin/cos range reduction for mediump. 2020-05-05 17:23:34 +00:00
ir3_parser.y freedreno/ir3: rework setup_{input,output} to make struct varyings work 2020-09-01 15:10:47 +00:00
ir3_postsched.c freedreno/ir3: make mergedregs a property of the variant 2020-06-18 02:46:28 +00:00
ir3_print.c freedreno: deduplicate a3xx+ disasm 2020-07-28 09:45:08 +00:00
ir3_ra.c freedreno/ir3/ra: fix array conflicts for split/merged 2020-07-18 09:21:09 -07:00
ir3_ra.h freedreno/ir3/ra: be better at failing 2020-07-14 23:26:15 +00:00
ir3_ra_regset.c freedreno/ir3: decouple regset from gpu gen 2020-06-18 02:46:28 +00:00
ir3_sched.c freedreno/sched: reset delay counters at start of block 2020-06-16 20:56:15 +00:00
ir3_shader.c freedreno/ir3: add view_zero to shader key 2020-09-15 16:18:45 +00:00
ir3_shader.h nir: Rename get_buffer_size to get_ssbo_size 2020-09-22 13:34:12 +00:00
ir3_validate.c ir3: Validate bindless samp_tex correctly 2020-07-27 16:38:17 +00:00
meson.build freedreno/ir3: split out regmask 2020-07-28 09:45:08 +00:00
regmask.h freedreno: deduplicate a3xx+ disasm 2020-07-28 09:45:08 +00:00