Alyssa Rosenzweig 959ec01ac8 brw/nir_lower_fs_load_output: optimize pixel coord ... this saves a conversion or two. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40829>		2026-04-07 19:32:15 +00:00
..
blorp	Rename more sha and sha1 names to blake3	2026-03-23 07:03:28 +00:00
ci	ci: add api@clgetmemobjectinfo to fails	2026-03-31 17:39:47 +00:00
common	genxml/mi: add additional bit to FF_MODE and autostrip helper	2026-03-30 11:02:27 +00:00
compiler	brw/nir_lower_fs_load_output: optimize pixel coord	2026-04-07 19:32:15 +00:00
decoder	intel/decoder: update warning message when buildtype=release	2026-03-09 20:01:01 +00:00
dev	intel/dev: add state cache perf fix support xe detection	2026-03-24 18:17:42 +00:00
ds	intel/ds: Modify rejection threshold to scale with requested sample period	2026-04-02 18:56:16 +00:00
executor	meson: make dep_lua a disabler	2025-11-21 21:48:57 +00:00
genxml	genxml/mi: add additional bit to FF_MODE and autostrip helper	2026-03-30 11:02:27 +00:00
isl	isl: speedup buffer fills by dropping swizzle programming	2026-03-30 12:05:28 +00:00
mda	intel/mda: Use -W for color words diff and -U for regular unified diff	2026-01-28 22:11:11 +00:00
nullhw-layer	build: avoid redefining unreachable() which is standard in C23	2025-07-31 17:49:42 +00:00
perf	intel/tools: Add xe3p format for intel_monitor	2026-03-26 07:31:09 +00:00
shaders	intel/shaders: Build for Xe3P (GFX_VERx10 == 350)	2026-03-04 11:10:34 -08:00
tools	intel/tools: Add xe3p format for intel_monitor	2026-03-26 07:31:09 +00:00
vulkan	anv: don't relocate memory from blob	2026-04-03 20:01:49 +00:00
vulkan_hasvk	nir,treewide: add nir_image_intrinsic_type	2026-03-31 09:10:27 +00:00
meson.build	brw: Move into a new src/intel/compiler/brw subdirectory	2025-10-09 07:01:47 +00:00