mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2025-12-20 20:20:18 +01:00
Via Coccinelle patch:
@@
@@
-nir_metadata_block_index | nir_metadata_dominance
+nir_metadata_control_flow
...plus some manual fixups for call sites missed by coccinelle.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Juan A. Suarez Romero <jasuarez@igalia.com> [broadcom]
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com> [lima]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29745>
339 lines
10 KiB
C
339 lines
10 KiB
C
/*
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* Copyright 2023 Valve Corporation
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* Copyright 2020 Collabora, Ltd.
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* SPDX-License-Identifier: MIT
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*/
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#include "nir_legacy.h"
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#include "nir.h"
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#include "nir_builder.h"
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bool
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nir_legacy_float_mod_folds(nir_alu_instr *mod)
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{
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assert(mod->op == nir_op_fabs || mod->op == nir_op_fneg);
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/* No legacy user supports fp64 modifiers */
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if (mod->def.bit_size == 64)
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return false;
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nir_foreach_use_including_if(src, &mod->def) {
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if (nir_src_is_if(src))
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return false;
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nir_instr *parent = nir_src_parent_instr(src);
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if (parent->type != nir_instr_type_alu)
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return false;
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nir_alu_instr *alu = nir_instr_as_alu(parent);
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nir_alu_src *alu_src = list_entry(src, nir_alu_src, src);
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unsigned src_index = alu_src - alu->src;
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assert(src_index < nir_op_infos[alu->op].num_inputs);
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nir_alu_type src_type = nir_op_infos[alu->op].input_types[src_index];
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if (nir_alu_type_get_base_type(src_type) != nir_type_float)
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return false;
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}
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return true;
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}
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static nir_legacy_alu_src
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chase_alu_src_helper(const nir_src *src)
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{
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nir_intrinsic_instr *load = nir_load_reg_for_def(src->ssa);
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if (load) {
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bool indirect = (load->intrinsic == nir_intrinsic_load_reg_indirect);
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return (nir_legacy_alu_src){
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.src.is_ssa = false,
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.src.reg = {
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.handle = load->src[0].ssa,
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.base_offset = nir_intrinsic_base(load),
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.indirect = indirect ? load->src[1].ssa : NULL },
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.fabs = nir_intrinsic_legacy_fabs(load),
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.fneg = nir_intrinsic_legacy_fneg(load),
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};
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} else {
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return (nir_legacy_alu_src){
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.src.is_ssa = true,
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.src.ssa = src->ssa,
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};
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}
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}
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static inline bool
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chase_source_mod(nir_def **ssa, nir_op op, uint8_t *swizzle)
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{
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if ((*ssa)->parent_instr->type != nir_instr_type_alu)
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return false;
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nir_alu_instr *alu = nir_instr_as_alu((*ssa)->parent_instr);
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if (alu->op != op)
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return false;
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/* If there are other uses of the modifier that don't fold, we can't fold it
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* here either, in case of it's reading from a load_reg that won't be
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* emitted.
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*/
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if (!nir_legacy_float_mod_folds(alu))
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return false;
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/* This only works for unary ops */
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assert(nir_op_infos[op].num_inputs == 1);
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/* To fuse the source mod in, we need to compose the swizzles and string
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* through the source.
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*/
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for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
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swizzle[i] = alu->src[0].swizzle[swizzle[i]];
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*ssa = alu->src[0].src.ssa;
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return true;
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}
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nir_legacy_alu_src
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nir_legacy_chase_alu_src(const nir_alu_src *src, bool fuse_fabs)
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{
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if (src->src.ssa->parent_instr->type == nir_instr_type_alu) {
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nir_legacy_alu_src out = {
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.src.is_ssa = true,
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.src.ssa = src->src.ssa,
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};
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STATIC_ASSERT(sizeof(src->swizzle) == sizeof(out.swizzle));
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memcpy(out.swizzle, src->swizzle, sizeof(src->swizzle));
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/* To properly handle foo(fneg(fabs(x))), we first chase fneg and then
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* fabs, since we chase from bottom-up. We don't handle fabs(fneg(x))
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* since nir_opt_algebraic should have eliminated that.
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*/
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out.fneg = chase_source_mod(&out.src.ssa, nir_op_fneg, out.swizzle);
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if (fuse_fabs)
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out.fabs = chase_source_mod(&out.src.ssa, nir_op_fabs, out.swizzle);
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return out;
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} else {
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nir_legacy_alu_src out = chase_alu_src_helper(&src->src);
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memcpy(out.swizzle, src->swizzle, sizeof(src->swizzle));
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return out;
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}
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}
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static nir_legacy_alu_dest
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chase_alu_dest_helper(nir_def *def)
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{
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nir_intrinsic_instr *store = nir_store_reg_for_def(def);
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if (store) {
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bool indirect = (store->intrinsic == nir_intrinsic_store_reg_indirect);
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return (nir_legacy_alu_dest){
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.dest.is_ssa = false,
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.dest.reg = {
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.handle = store->src[1].ssa,
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.base_offset = nir_intrinsic_base(store),
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.indirect = indirect ? store->src[2].ssa : NULL },
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.fsat = nir_intrinsic_legacy_fsat(store),
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.write_mask = nir_intrinsic_write_mask(store),
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};
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} else {
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return (nir_legacy_alu_dest){
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.dest.is_ssa = true,
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.dest.ssa = def,
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.write_mask = nir_component_mask(def->num_components),
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};
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}
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}
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bool
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nir_legacy_fsat_folds(nir_alu_instr *fsat)
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{
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assert(fsat->op == nir_op_fsat);
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nir_def *def = fsat->src[0].src.ssa;
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/* No legacy user supports fp64 modifiers */
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if (def->bit_size == 64)
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return false;
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/* Must be the only use */
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if (!list_is_singular(&def->uses))
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return false;
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assert(&fsat->src[0].src ==
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list_first_entry(&def->uses, nir_src, use_link));
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nir_instr *generate = def->parent_instr;
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if (generate->type != nir_instr_type_alu)
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return false;
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nir_alu_instr *generate_alu = nir_instr_as_alu(generate);
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nir_alu_type dest_type = nir_op_infos[generate_alu->op].output_type;
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if (dest_type != nir_type_float)
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return false;
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/* If we are a saturating a source modifier fsat(fabs(x)), we need to emit
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* either the fsat or the modifier or else the sequence disappears.
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*/
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if (generate_alu->op == nir_op_fabs || generate_alu->op == nir_op_fneg)
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return false;
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/* We can't do expansions without a move in the middle */
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unsigned nr_components = generate_alu->def.num_components;
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if (fsat->def.num_components != nr_components)
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return false;
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/* We don't handle swizzles here, so check for the identity */
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for (unsigned i = 0; i < nr_components; ++i) {
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if (fsat->src[0].swizzle[i] != i)
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return false;
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}
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return true;
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}
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static inline bool
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chase_fsat(nir_def **def)
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{
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/* No legacy user supports fp64 modifiers */
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if ((*def)->bit_size == 64)
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return false;
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if (!list_is_singular(&(*def)->uses))
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return false;
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nir_src *use = list_first_entry(&(*def)->uses, nir_src, use_link);
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if (nir_src_is_if(use) || nir_src_parent_instr(use)->type != nir_instr_type_alu)
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return false;
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nir_alu_instr *fsat = nir_instr_as_alu(nir_src_parent_instr(use));
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if (fsat->op != nir_op_fsat || !nir_legacy_fsat_folds(fsat))
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return false;
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/* Otherwise, we're good */
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nir_alu_instr *alu = nir_instr_as_alu(nir_src_parent_instr(use));
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*def = &alu->def;
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return true;
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}
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nir_legacy_alu_dest
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nir_legacy_chase_alu_dest(nir_def *def)
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{
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/* Try SSA fsat. No users support 64-bit modifiers. */
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if (chase_fsat(&def)) {
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return (nir_legacy_alu_dest){
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.dest.is_ssa = true,
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.dest.ssa = def,
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.fsat = true,
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.write_mask = nir_component_mask(def->num_components),
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};
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} else {
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return chase_alu_dest_helper(def);
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}
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}
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nir_legacy_src
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nir_legacy_chase_src(const nir_src *src)
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{
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nir_legacy_alu_src alu_src = chase_alu_src_helper(src);
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assert(!alu_src.fabs && !alu_src.fneg);
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return alu_src.src;
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}
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nir_legacy_dest
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nir_legacy_chase_dest(nir_def *def)
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{
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nir_legacy_alu_dest alu_dest = chase_alu_dest_helper(def);
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assert(!alu_dest.fsat);
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assert(alu_dest.write_mask == nir_component_mask(def->num_components));
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return alu_dest.dest;
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}
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static bool
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fuse_mods_with_registers(nir_builder *b, nir_instr *instr, void *fuse_fabs_)
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{
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bool *fuse_fabs = fuse_fabs_;
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if (instr->type != nir_instr_type_alu)
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return false;
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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if ((alu->op == nir_op_fneg || (*fuse_fabs && alu->op == nir_op_fabs)) &&
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nir_legacy_float_mod_folds(alu)) {
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/* Try to fold this instruction into the load, if possible. We only do
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* this for loads in the same block as the use because uses of loads
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* which cross block boundaries aren't trivial anyway.
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*/
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nir_intrinsic_instr *load = nir_load_reg_for_def(alu->src[0].src.ssa);
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if (load != NULL) {
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/* Duplicate the load before changing it in case there are other
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* users. We assume someone has run CSE so there should be at most
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* four load instructions generated (one for each possible modifier
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* combination), but likely only one or two.
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*/
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b->cursor = nir_before_instr(&load->instr);
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load = nir_instr_as_intrinsic(nir_instr_clone(b->shader, &load->instr));
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nir_builder_instr_insert(b, &load->instr);
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if (alu->op == nir_op_fabs) {
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nir_intrinsic_set_legacy_fabs(load, true);
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nir_intrinsic_set_legacy_fneg(load, false);
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} else {
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assert(alu->op == nir_op_fneg);
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bool old_fneg = nir_intrinsic_legacy_fneg(load);
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nir_intrinsic_set_legacy_fneg(load, !old_fneg);
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}
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/* Rewrite all the users to use the modified load instruction. We
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* already know that they're all float ALU instructions because
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* nir_legacy_float_mod_folds() returned true.
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*/
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nir_foreach_use_including_if_safe(use, &alu->def) {
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assert(!nir_src_is_if(use));
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assert(nir_src_parent_instr(use)->type == nir_instr_type_alu);
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nir_alu_src *alu_use = list_entry(use, nir_alu_src, src);
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nir_src_rewrite(&alu_use->src, &load->def);
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for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
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alu_use->swizzle[i] = alu->src[0].swizzle[alu_use->swizzle[i]];
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}
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nir_instr_remove(&alu->instr);
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return true;
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} else {
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/* We don't want to attempt to add saturate to foldable mod ops */
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return false;
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}
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}
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nir_legacy_alu_dest dest = nir_legacy_chase_alu_dest(&alu->def);
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if (dest.fsat) {
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nir_intrinsic_instr *store = nir_store_reg_for_def(dest.dest.ssa);
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if (store) {
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nir_intrinsic_set_legacy_fsat(store, true);
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nir_src_rewrite(&store->src[0], &alu->def);
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return true;
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}
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}
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return false;
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}
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void
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nir_legacy_trivialize(nir_shader *s, bool fuse_fabs)
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{
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/* First, fuse modifiers with registers. This ensures that the helpers do not
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* chase registers recursively, allowing registers to be trivialized easier.
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*/
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if (nir_shader_instructions_pass(s, fuse_mods_with_registers,
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nir_metadata_control_flow,
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&fuse_fabs)) {
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/* If we made progress, we likely left dead loads. Clean them up. */
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NIR_PASS_V(s, nir_opt_dce);
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}
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/* Now that modifiers are dealt with, we can trivialize the regular way. */
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NIR_PASS_V(s, nir_trivialize_registers);
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}
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