mesa/src/broadcom
Iago Toral Quiroga 947e9e42cc broadcom/compiler: simplify ldvary pipelining
We get optimal ldvary pipelining by doing the following:

1) Carefully merge a paired ldvary into the previous instruction when
   possible.
2) When the above succeeds, flag the ldvary as scheduled immediately so
   we can merge one of its children into the current instruction.
3) When scheduling ldvary sequences, only pick up instructions that are
   part of the sequence to avoid picking up something that prevents
   successful pipelining.

This patch skips 3) assuming some hurt shaders in exchange for better
scheduling flexibility during ldvary sequences. Besides eliminating most
of the code dedicated to special handling ldvary sequences, this also
usually allows us to produce better code by merging instructions that are
unrelated to ldvary sequences into the ldvary sequences, which is
particularly effective to fill up the gaps produced when scheduling the
first and last ldvary sequences as well as the gaps produced by flat
and noperspective varyings sequences that don't have both mul and add
instructions.

Notice that there are some hurt shaders, because some times the extra
scheduler flexibility can lead to picking up instructions that will
break a sequence without compensating for that, typically an ldunif
that prevents us from doing the fixup for a follow-up ldvary. We will
try to correct some of these cases with the next patch.

total instructions in shared programs: 13786037 -> 13760415 (-0.19%)
instructions in affected programs: 3201387 -> 3175765 (-0.80%)
helped: 16155
HURT: 4146
Instructions are helped.

total max-temps in shared programs: 2324834 -> 2322991 (-0.08%)
max-temps in affected programs: 22160 -> 20317 (-8.32%)
helped: 1340
HURT: 103
Max-temps are helped.

total sfu-stalls in shared programs: 30685 -> 31827 (3.72%)
sfu-stalls in affected programs: 782 -> 1924 (146.04%)
helped: 253
HURT: 1416
Inconclusive result.

total inst-and-stalls in shared programs: 13816722 -> 13792242 (-0.18%)
inst-and-stalls in affected programs: 3171642 -> 3147162 (-0.77%)
helped: 15331
HURT: 4179
Inst-and-stalls are helped.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9471>
2021-03-10 07:52:22 +00:00
..
ci mesa: fix fbo attachment size check for RBs, make it trigger in ES2 2021-03-06 20:29:41 +00:00
cle v3d: force alpha to 1 when rendering RGBX formats 2020-12-09 12:25:31 +00:00
clif v3dv: clif format dumping support 2020-10-13 21:21:26 +00:00
common v3dv: serialize pipeline compilation when debugging shaders 2021-02-08 13:00:16 +00:00
compiler broadcom/compiler: simplify ldvary pipelining 2021-03-10 07:52:22 +00:00
drm-shim vc4: add drm-shim 2021-01-28 16:14:06 +00:00
qpu broadcom/compiler: ldvary doesn't implicitly write to r3 since V3D 4.1 2021-03-05 13:37:39 +01:00
simulator v3d/simulator: add v3d_simulator_get_mem_size 2020-10-13 21:21:33 +00:00
vulkan nir: Make nir_ssa_def_rewrite_uses take an SSA value 2021-03-08 16:59:55 +00:00
.editorconfig broadcom: add editorconfig 2017-07-25 14:44:52 -07:00
Android.cle.mk android: broadcom/cle: export the broadcom top level path headers 2018-09-15 09:14:46 +02:00
Android.genxml.mk android: broadcom/genxml: fix collision with intel/genxml header-gen macro 2018-09-15 09:14:33 +02:00
Android.mk broadcom/genxml: Introduce a V3D packet/struct decoder. 2017-07-25 14:44:52 -07:00
Makefile.sources v3d: Add a lowering pass for line smoothing 2020-07-06 21:59:16 +00:00
meson.build v3dv: add v3d vulkan driver skeleton 2020-10-13 21:21:24 +00:00