mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-26 12:28:12 +02:00
13fdde0c7d
There are more things to do, e.g. BV mempool dumping and estimating the BV location. However this is a good start. The expanded register size is because the reglist includes registers from other cores and these are read the same as any other GPU register. Note that this is also the actual range of type4 packets, even though registers higher than 0xffff are all protected. Right now these are skipped on page faults but still read with the crashdumper for hangs. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27266>
1016 lines
27 KiB
C
1016 lines
27 KiB
C
/*
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* Copyright © 2020 Google, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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/*
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* Decoder for devcoredump traces from drm/msm. In case of a gpu crash/hang,
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* the coredump should be found in:
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*
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* /sys/class/devcoredump/devcd<n>/data
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*
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* The crashdump will hang around for 5min, it can be cleared by writing to
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* the file, ie:
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*
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* echo 1 > /sys/class/devcoredump/devcd<n>/data
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*
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* (the driver won't log any new crashdumps until the previous one is cleared
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* or times out after 5min)
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*/
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#include "crashdec.h"
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static FILE *in;
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bool verbose;
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struct rnn *rnn_gmu;
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struct rnn *rnn_control;
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struct rnn *rnn_pipe;
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static uint64_t fault_iova;
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static bool has_fault_iova;
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struct cffdec_options options = {
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.draw_filter = -1,
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};
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/*
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* Helpers to read register values:
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*/
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/* read registers that are 64b on 64b GPUs (ie. a5xx+) */
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static uint64_t
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regval64(const char *name)
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{
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unsigned reg = regbase(name);
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assert(reg);
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uint64_t val = reg_val(reg);
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if (is_64b())
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val |= ((uint64_t)reg_val(reg + 1)) << 32;
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return val;
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}
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static uint32_t
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regval(const char *name)
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{
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unsigned reg = regbase(name);
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assert(reg);
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return reg_val(reg);
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}
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/*
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* Line reading and string helpers:
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*/
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static char *
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replacestr(char *line, const char *find, const char *replace)
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{
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char *tail, *s;
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if (!(s = strstr(line, find)))
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return line;
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tail = s + strlen(find);
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char *newline;
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asprintf(&newline, "%.*s%s%s", (int)(s - line), line, replace, tail);
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free(line);
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return newline;
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}
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static char *lastline;
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static char *pushedline;
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static const char *
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popline(void)
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{
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char *r = pushedline;
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if (r) {
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pushedline = NULL;
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return r;
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}
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free(lastline);
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size_t n = 0;
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if (getline(&r, &n, in) < 0)
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exit(0);
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/* Handle section name typo's from earlier kernels: */
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r = replacestr(r, "CP_MEMPOOOL", "CP_MEMPOOL");
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r = replacestr(r, "CP_SEQ_STAT", "CP_SQE_STAT");
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lastline = r;
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return r;
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}
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static void
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pushline(void)
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{
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assert(!pushedline);
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pushedline = lastline;
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}
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static uint32_t *
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popline_ascii85(uint32_t sizedwords)
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{
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const char *line = popline();
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/* At this point we exepct the ascii85 data to be indented *some*
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* amount, and to terminate at the end of the line. So just eat
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* up the leading whitespace.
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*/
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assert(*line == ' ');
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while (*line == ' ')
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line++;
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uint32_t *buf = calloc(1, 4 * sizedwords);
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int idx = 0;
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while (*line != '\n') {
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if (*line == 'z') {
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buf[idx++] = 0;
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line++;
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continue;
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}
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uint32_t accum = 0;
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for (int i = 0; (i < 5) && (*line != '\n'); i++) {
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accum *= 85;
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accum += *line - '!';
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line++;
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}
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buf[idx++] = accum;
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}
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return buf;
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}
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static bool
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startswith(const char *line, const char *start)
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{
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return strstr(line, start) == line;
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}
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static bool
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startswith_nowhitespace(const char *line, const char *start)
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{
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while (*line == ' ' || *line == '\t')
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line++;
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return startswith(line, start);
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}
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static void
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vparseline(const char *line, const char *fmt, va_list ap)
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{
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int fmtlen = strlen(fmt);
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int n = 0;
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int l = 0;
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/* scan fmt string to extract expected # of conversions: */
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for (int i = 0; i < fmtlen; i++) {
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if (fmt[i] == '%') {
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if (i == (l - 1)) { /* prev char was %, ie. we have %% */
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n--;
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l = 0;
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} else {
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n++;
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l = i;
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}
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}
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}
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if (vsscanf(line, fmt, ap) != n) {
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fprintf(stderr, "parse error scanning: '%s'\n", fmt);
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exit(1);
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}
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}
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static void
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parseline(const char *line, const char *fmt, ...)
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{
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va_list ap;
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va_start(ap, fmt);
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vparseline(line, fmt, ap);
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va_end(ap);
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}
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static void
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parseline_nowhitespace(const char *line, const char *fmt, ...)
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{
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while (*line == ' ' || *line == '\t')
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line++;
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va_list ap;
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va_start(ap, fmt);
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vparseline(line, fmt, ap);
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va_end(ap);
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}
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#define foreach_line_in_section(_line) \
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for (const char *_line = popline(); _line; _line = popline()) \
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/* check for start of next section */ \
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if (_line[0] != ' ') { \
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pushline(); \
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break; \
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} else
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/*
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* Decode ringbuffer section:
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*/
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static struct {
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uint64_t iova;
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uint32_t rptr;
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uint32_t wptr;
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uint32_t size;
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uint32_t *buf;
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} ringbuffers[5];
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static void
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decode_ringbuffer(void)
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{
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int id = 0;
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foreach_line_in_section (line) {
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if (startswith(line, " - id:")) {
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parseline(line, " - id: %d", &id);
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assert(id < ARRAY_SIZE(ringbuffers));
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} else if (startswith(line, " iova:")) {
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parseline(line, " iova: %" PRIx64, &ringbuffers[id].iova);
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} else if (startswith(line, " rptr:")) {
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parseline(line, " rptr: %d", &ringbuffers[id].rptr);
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} else if (startswith(line, " wptr:")) {
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parseline(line, " wptr: %d", &ringbuffers[id].wptr);
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} else if (startswith(line, " size:")) {
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parseline(line, " size: %d", &ringbuffers[id].size);
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} else if (startswith(line, " data: !!ascii85 |")) {
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ringbuffers[id].buf = popline_ascii85(ringbuffers[id].size / 4);
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add_buffer(ringbuffers[id].iova, ringbuffers[id].size,
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ringbuffers[id].buf);
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continue;
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}
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printf("%s", line);
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}
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}
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/*
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* Decode GMU log
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*/
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static void
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decode_gmu_log(void)
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{
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uint64_t iova;
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uint32_t size;
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foreach_line_in_section (line) {
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if (startswith(line, " iova:")) {
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parseline(line, " iova: %" PRIx64, &iova);
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} else if (startswith(line, " size:")) {
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parseline(line, " size: %u", &size);
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} else if (startswith(line, " data: !!ascii85 |")) {
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void *buf = popline_ascii85(size / 4);
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dump_hex_ascii(buf, size, 1);
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free(buf);
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continue;
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}
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printf("%s", line);
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}
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}
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/*
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* Decode HFI queues
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*/
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static void
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decode_gmu_hfi(void)
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{
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struct a6xx_hfi_state hfi = {};
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/* Initialize the history buffers with invalid entries (-1): */
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memset(&hfi.history, 0xff, sizeof(hfi.history));
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foreach_line_in_section (line) {
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if (startswith(line, " iova:")) {
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parseline(line, " iova: %" PRIx64, &hfi.iova);
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} else if (startswith(line, " size:")) {
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parseline(line, " size: %u", &hfi.size);
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} else if (startswith(line, " queue-history")) {
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unsigned qidx, dummy;
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parseline(line, " queue-history[%u]:", &qidx);
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assert(qidx < ARRAY_SIZE(hfi.history));
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parseline(line, " queue-history[%u]: %d %d %d %d %d %d %d %d", &dummy,
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&hfi.history[qidx][0], &hfi.history[qidx][1],
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&hfi.history[qidx][2], &hfi.history[qidx][3],
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&hfi.history[qidx][4], &hfi.history[qidx][5],
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&hfi.history[qidx][6], &hfi.history[qidx][7]);
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} else if (startswith(line, " data: !!ascii85 |")) {
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hfi.buf = popline_ascii85(hfi.size / 4);
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if (verbose)
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dump_hex_ascii(hfi.buf, hfi.size, 1);
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dump_gmu_hfi(&hfi);
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free(hfi.buf);
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continue;
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}
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printf("%s", line);
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}
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}
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static bool
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valid_header(uint32_t pkt)
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{
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if (options.info->chip >= 5) {
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return pkt_is_type4(pkt) || pkt_is_type7(pkt);
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} else {
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/* TODO maybe we can check validish looking pkt3 opc or pkt0
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* register offset.. the cmds sent by kernel are usually
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* fairly limited (other than initialization) which confines
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* the search space a bit..
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*/
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return true;
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}
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}
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static void
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dump_cmdstream(void)
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{
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uint64_t rb_base = regval64("CP_RB_BASE");
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printf("got rb_base=%" PRIx64 "\n", rb_base);
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options.ibs[1].base = regval64("CP_IB1_BASE");
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if (have_rem_info())
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options.ibs[1].rem = regval("CP_IB1_REM_SIZE");
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options.ibs[2].base = regval64("CP_IB2_BASE");
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if (have_rem_info())
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options.ibs[2].rem = regval("CP_IB2_REM_SIZE");
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/* Adjust remaining size to account for cmdstream slurped into ROQ
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* but not yet consumed by SQE
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*
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* TODO add support for earlier GPUs once we tease out the needed
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* registers.. see crashit.c in msmtest for hints.
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*
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* TODO it would be nice to be able to extract out register bitfields
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* by name rather than hard-coding this.
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*/
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if (have_rem_info()) {
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uint32_t ib1_rem = regval("CP_ROQ_AVAIL_IB1") >> 16;
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uint32_t ib2_rem = regval("CP_ROQ_AVAIL_IB2") >> 16;
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options.ibs[1].rem += ib1_rem ? ib1_rem - 1 : 0;
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options.ibs[2].rem += ib2_rem ? ib2_rem - 1 : 0;
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}
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printf("IB1: %" PRIx64 ", %u\n", options.ibs[1].base, options.ibs[1].rem);
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printf("IB2: %" PRIx64 ", %u\n", options.ibs[2].base, options.ibs[2].rem);
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/* now that we've got the regvals we want, reset register state
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* so we aren't seeing values from decode_registers();
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*/
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reset_regs();
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for (int id = 0; id < ARRAY_SIZE(ringbuffers); id++) {
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if (ringbuffers[id].iova != rb_base)
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continue;
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if (!ringbuffers[id].size)
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continue;
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printf("found ring!\n");
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/* The kernel level ringbuffer (RB) wraps around, which
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* cffdec doesn't really deal with.. so figure out how
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* many dwords are unread
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*/
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unsigned ringszdw = ringbuffers[id].size >> 2; /* in dwords */
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if (verbose) {
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handle_prefetch(ringbuffers[id].buf, ringszdw);
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dump_commands(ringbuffers[id].buf, ringszdw, 0);
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return;
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}
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/* helper macro to deal with modulo size math: */
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#define mod_add(b, v) ((ringszdw + (int)(b) + (int)(v)) % ringszdw)
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/* The rptr will (most likely) have moved past the IB to
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* userspace cmdstream, so back up a bit, and then advance
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* until we find a valid start of a packet.. this is going
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* to be less reliable on a4xx and before (pkt0/pkt3),
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* compared to pkt4/pkt7 with parity bits
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*/
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const int lookback = 12;
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unsigned rptr = mod_add(ringbuffers[id].rptr, -lookback);
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for (int idx = 0; idx < lookback; idx++) {
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if (valid_header(ringbuffers[id].buf[rptr]))
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break;
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rptr = mod_add(rptr, 1);
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}
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unsigned cmdszdw = mod_add(ringbuffers[id].wptr, -rptr);
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printf("got cmdszdw=%d\n", cmdszdw);
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uint32_t *buf = malloc(cmdszdw * 4);
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for (int idx = 0; idx < cmdszdw; idx++) {
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int p = mod_add(rptr, idx);
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buf[idx] = ringbuffers[id].buf[p];
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}
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handle_prefetch(buf, cmdszdw);
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dump_commands(buf, cmdszdw, 0);
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free(buf);
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}
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}
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/*
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* Decode optional 'fault-info' section. We only get this section if
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* the devcoredump was triggered by an iova fault:
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*/
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static void
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decode_fault_info(void)
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{
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foreach_line_in_section (line) {
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if (startswith(line, " - far:")) {
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parseline(line, " - far: %" PRIx64, &fault_iova);
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has_fault_iova = true;
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}
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printf("%s", line);
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}
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}
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/*
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* Decode 'bos' (buffers) section:
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*/
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static void
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decode_bos(void)
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{
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uint32_t size = 0;
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uint64_t iova = 0;
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foreach_line_in_section (line) {
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if (startswith(line, " - iova:")) {
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parseline(line, " - iova: %" PRIx64, &iova);
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continue;
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} else if (startswith(line, " size:")) {
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parseline(line, " size: %u", &size);
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/*
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* This is a bit convoluted, vs just printing the lines as
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* they come. But we want to have both the iova and size
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* so we can print the end address of the buffer
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*/
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uint64_t end = iova + size;
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printf(" - iova: 0x%016" PRIx64 "-0x%016" PRIx64, iova, end);
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if (has_fault_iova) {
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if ((iova <= fault_iova) && (fault_iova < end)) {
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/* Fault address was within what should be a mapped buffer!! */
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printf("\t==");
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} else if ((iova <= fault_iova) && (fault_iova < (end + size))) {
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/* Fault address was near this mapped buffer */
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printf("\t>=");
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}
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}
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printf("\n");
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printf(" size: %u (0x%x)\n", size, size);
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continue;
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} else if (startswith(line, " data: !!ascii85 |")) {
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uint32_t *buf = popline_ascii85(size / 4);
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if (verbose)
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dump_hex_ascii(buf, size, 1);
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add_buffer(iova, size, buf);
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continue;
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}
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printf("%s", line);
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}
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}
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/*
|
|
* Decode registers section:
|
|
*/
|
|
|
|
void
|
|
dump_register(struct regacc *r)
|
|
{
|
|
struct rnndecaddrinfo *info = rnn_reginfo(r->rnn, r->regbase);
|
|
if (info && info->typeinfo) {
|
|
char *decoded = rnndec_decodeval(r->rnn->vc, info->typeinfo, r->value);
|
|
printf("%s: %s\n", info->name, decoded);
|
|
} else if (info) {
|
|
printf("%s: %08"PRIx64"\n", info->name, r->value);
|
|
} else {
|
|
printf("<%04x>: %08"PRIx64"\n", r->regbase, r->value);
|
|
}
|
|
rnn_reginfo_free(info);
|
|
}
|
|
|
|
static void
|
|
decode_gmu_registers(void)
|
|
{
|
|
struct regacc r = regacc(rnn_gmu);
|
|
|
|
foreach_line_in_section (line) {
|
|
uint32_t offset, value;
|
|
parseline(line, " - { offset: %x, value: %x }", &offset, &value);
|
|
|
|
if (regacc_push(&r, offset / 4, value)) {
|
|
printf("\t%08"PRIx64"\t", r.value);
|
|
dump_register(&r);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
decode_registers(void)
|
|
{
|
|
struct regacc r = regacc(NULL);
|
|
|
|
foreach_line_in_section (line) {
|
|
uint32_t offset, value;
|
|
parseline(line, " - { offset: %x, value: %x }", &offset, &value);
|
|
|
|
reg_set(offset / 4, value);
|
|
if (regacc_push(&r, offset / 4, value)) {
|
|
printf("\t%08"PRIx64, r.value);
|
|
dump_register_val(&r, 0);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* similar to registers section, but for banked context regs: */
|
|
static void
|
|
decode_clusters(void)
|
|
{
|
|
struct regacc r = regacc(NULL);
|
|
|
|
foreach_line_in_section (line) {
|
|
if (startswith_nowhitespace(line, "- cluster-name:") ||
|
|
startswith_nowhitespace(line, "- context:") ||
|
|
startswith_nowhitespace(line, "- pipe:")) {
|
|
printf("%s", line);
|
|
continue;
|
|
}
|
|
|
|
uint32_t offset, value;
|
|
parseline_nowhitespace(line, "- { offset: %x, value: %x }", &offset, &value);
|
|
|
|
if (regacc_push(&r, offset / 4, value)) {
|
|
printf("\t%08"PRIx64, r.value);
|
|
dump_register_val(&r, 0);
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Decode indexed-registers.. these aren't like normal registers, but a
|
|
* sort of FIFO where successive reads pop out associated debug state.
|
|
*/
|
|
|
|
static void
|
|
dump_cp_sqe_stat(uint32_t *stat)
|
|
{
|
|
printf("\t PC: %04x\n", stat[0]);
|
|
stat++;
|
|
|
|
if (!is_a5xx() && valid_header(stat[0])) {
|
|
if (pkt_is_type7(stat[0])) {
|
|
unsigned opc = cp_type7_opcode(stat[0]);
|
|
const char *name = pktname(opc);
|
|
if (name)
|
|
printf("\tPKT: %s\n", name);
|
|
} else {
|
|
/* Not sure if this case can happen: */
|
|
}
|
|
}
|
|
|
|
for (int i = 0; i < 16; i++) {
|
|
printf("\t$%02x: %08x\t\t$%02x: %08x\n", i + 1, stat[i], i + 16 + 1,
|
|
stat[i + 16]);
|
|
}
|
|
}
|
|
|
|
static void
|
|
dump_control_regs(uint32_t *regs)
|
|
{
|
|
if (!rnn_control)
|
|
return;
|
|
|
|
struct regacc r = regacc(rnn_control);
|
|
|
|
/* Control regs 0x100-0x17f are a scratch space to be used by the
|
|
* firmware however it wants, unlike lower regs which involve some
|
|
* fixed-function units. Therefore only these registers get dumped
|
|
* directly.
|
|
*/
|
|
for (uint32_t i = 0; i < 0x80; i++) {
|
|
if (regacc_push(&r, i + 0x100, regs[i])) {
|
|
printf("\t%08"PRIx64"\t", r.value);
|
|
dump_register(&r);
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
dump_cp_ucode_dbg(uint32_t *dbg)
|
|
{
|
|
/* Notes on the data:
|
|
* There seems to be a section every 4096 DWORD's. The sections aren't
|
|
* all the same size, so the rest of the 4096 DWORD's are filled with
|
|
* mirrors of the actual data.
|
|
*/
|
|
|
|
for (int section = 0; section < 6; section++, dbg += 0x1000) {
|
|
switch (section) {
|
|
case 0:
|
|
/* Contains scattered data from a630_sqe.fw: */
|
|
printf("\tSQE instruction cache:\n");
|
|
dump_hex_ascii(dbg, 4 * 0x400, 1);
|
|
break;
|
|
case 1:
|
|
printf("\tUnknown 1:\n");
|
|
dump_hex_ascii(dbg, 4 * 0x80, 1);
|
|
break;
|
|
case 2:
|
|
printf("\tUnknown 2:\n");
|
|
dump_hex_ascii(dbg, 4 * 0x200, 1);
|
|
break;
|
|
case 3:
|
|
printf("\tUnknown 3:\n");
|
|
dump_hex_ascii(dbg, 4 * 0x80, 1);
|
|
break;
|
|
case 4:
|
|
/* Don't bother printing this normally */
|
|
if (verbose) {
|
|
printf("\tSQE packet jumptable contents:\n");
|
|
dump_hex_ascii(dbg, 4 * 0x80, 1);
|
|
}
|
|
break;
|
|
case 5:
|
|
printf("\tSQE scratch control regs:\n");
|
|
dump_control_regs(dbg);
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void
|
|
decode_indexed_registers(void)
|
|
{
|
|
char *name = NULL;
|
|
uint32_t sizedwords = 0;
|
|
|
|
foreach_line_in_section (line) {
|
|
if (startswith(line, " - regs-name:")) {
|
|
free(name);
|
|
parseline(line, " - regs-name: %ms", &name);
|
|
} else if (startswith(line, " dwords:")) {
|
|
parseline(line, " dwords: %u", &sizedwords);
|
|
} else if (startswith(line, " data: !!ascii85 |")) {
|
|
uint32_t *buf = popline_ascii85(sizedwords);
|
|
|
|
/* some of the sections are pretty large, and are (at least
|
|
* so far) not useful, so skip them if not in verbose mode:
|
|
*/
|
|
bool dump = verbose || !strcmp(name, "CP_SQE_STAT") ||
|
|
!strcmp(name, "CP_BV_SQE_STAT") ||
|
|
!strcmp(name, "CP_DRAW_STATE") ||
|
|
!strcmp(name, "CP_ROQ") || 0;
|
|
|
|
if (!strcmp(name, "CP_SQE_STAT") || !strcmp(name, "CP_BV_SQE_STAT"))
|
|
dump_cp_sqe_stat(buf);
|
|
|
|
if (!strcmp(name, "CP_UCODE_DBG_DATA"))
|
|
dump_cp_ucode_dbg(buf);
|
|
|
|
if (!strcmp(name, "CP_MEMPOOL"))
|
|
dump_cp_mem_pool(buf);
|
|
|
|
if (dump)
|
|
dump_hex_ascii(buf, 4 * sizedwords, 1);
|
|
|
|
free(buf);
|
|
|
|
continue;
|
|
}
|
|
|
|
printf("%s", line);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Decode shader-blocks:
|
|
*/
|
|
|
|
static void
|
|
decode_shader_blocks(void)
|
|
{
|
|
char *type = NULL;
|
|
uint32_t sizedwords = 0;
|
|
|
|
foreach_line_in_section (line) {
|
|
if (startswith(line, " - type:")) {
|
|
free(type);
|
|
parseline(line, " - type: %ms", &type);
|
|
} else if (startswith_nowhitespace(line, "size:")) {
|
|
parseline_nowhitespace(line, "size: %u", &sizedwords);
|
|
} else if (startswith_nowhitespace(line, "data: !!ascii85 |")) {
|
|
uint32_t *buf = popline_ascii85(sizedwords);
|
|
|
|
/* some of the sections are pretty large, and are (at least
|
|
* so far) not useful, so skip them if not in verbose mode:
|
|
*/
|
|
bool dump = verbose || !strcmp(type, "A6XX_SP_INST_DATA") ||
|
|
!strcmp(type, "A6XX_HLSQ_INST_RAM") ||
|
|
!strcmp(type, "A7XX_SP_INST_DATA") ||
|
|
!strcmp(type, "A7XX_HLSQ_INST_RAM") || 0;
|
|
|
|
if (!strcmp(type, "A6XX_SP_INST_DATA") ||
|
|
!strcmp(type, "A6XX_HLSQ_INST_RAM") ||
|
|
!strcmp(type, "A7XX_SP_INST_DATA") ||
|
|
!strcmp(type, "A7XX_HLSQ_INST_RAM")) {
|
|
/* TODO this section actually contains multiple shaders
|
|
* (or parts of shaders?), so perhaps we should search
|
|
* for ends of shaders and decode each?
|
|
*/
|
|
try_disasm_a3xx(buf, sizedwords, 1, stdout, options.info->chip * 100);
|
|
}
|
|
|
|
if (dump)
|
|
dump_hex_ascii(buf, 4 * sizedwords, 1);
|
|
|
|
free(buf);
|
|
|
|
continue;
|
|
}
|
|
|
|
printf("%s", line);
|
|
}
|
|
|
|
free(type);
|
|
}
|
|
|
|
/*
|
|
* Decode debugbus section:
|
|
*/
|
|
|
|
static void
|
|
decode_debugbus(void)
|
|
{
|
|
char *block = NULL;
|
|
uint32_t sizedwords = 0;
|
|
|
|
foreach_line_in_section (line) {
|
|
if (startswith(line, " - debugbus-block:")) {
|
|
free(block);
|
|
parseline(line, " - debugbus-block: %ms", &block);
|
|
} else if (startswith(line, " count:")) {
|
|
parseline(line, " count: %u", &sizedwords);
|
|
} else if (startswith(line, " data: !!ascii85 |")) {
|
|
uint32_t *buf = popline_ascii85(sizedwords);
|
|
|
|
/* some of the sections are pretty large, and are (at least
|
|
* so far) not useful, so skip them if not in verbose mode:
|
|
*/
|
|
bool dump = verbose || 0;
|
|
|
|
if (dump)
|
|
dump_hex_ascii(buf, 4 * sizedwords, 1);
|
|
|
|
free(buf);
|
|
|
|
continue;
|
|
}
|
|
|
|
printf("%s", line);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Main crashdump decode loop:
|
|
*/
|
|
|
|
static void
|
|
decode(void)
|
|
{
|
|
const char *line;
|
|
|
|
while ((line = popline())) {
|
|
printf("%s", line);
|
|
if (startswith(line, "revision:")) {
|
|
unsigned core, major, minor, patchid;
|
|
|
|
parseline(line, "revision: %u (%u.%u.%u.%u)", &options.dev_id.gpu_id,
|
|
&core, &major, &minor, &patchid);
|
|
|
|
options.dev_id.chip_id = (core << 24) | (major << 16) | (minor << 8) | patchid;
|
|
options.info = fd_dev_info_raw(&options.dev_id);
|
|
if (!options.info) {
|
|
printf("Unsupported device\n");
|
|
break;
|
|
}
|
|
|
|
printf("Got chip_id=0x%"PRIx64"\n", options.dev_id.chip_id);
|
|
|
|
cffdec_init(&options);
|
|
|
|
if (is_a7xx()) {
|
|
rnn_gmu = rnn_new(!options.color);
|
|
rnn_load_file(rnn_gmu, "adreno/a6xx_gmu.xml", "A6XX");
|
|
rnn_control = rnn_new(!options.color);
|
|
rnn_load_file(rnn_control, "adreno/adreno_control_regs.xml",
|
|
"A7XX_CONTROL_REG");
|
|
rnn_pipe = rnn_new(!options.color);
|
|
rnn_load_file(rnn_pipe, "adreno/adreno_pipe_regs.xml",
|
|
"A7XX_PIPE_REG");
|
|
} else if (is_a6xx()) {
|
|
rnn_gmu = rnn_new(!options.color);
|
|
rnn_load_file(rnn_gmu, "adreno/a6xx_gmu.xml", "A6XX");
|
|
rnn_control = rnn_new(!options.color);
|
|
rnn_load_file(rnn_control, "adreno/adreno_control_regs.xml",
|
|
"A6XX_CONTROL_REG");
|
|
rnn_pipe = rnn_new(!options.color);
|
|
rnn_load_file(rnn_pipe, "adreno/adreno_pipe_regs.xml",
|
|
"A6XX_PIPE_REG");
|
|
} else if (is_a5xx()) {
|
|
rnn_control = rnn_new(!options.color);
|
|
rnn_load_file(rnn_control, "adreno/adreno_control_regs.xml",
|
|
"A5XX_CONTROL_REG");
|
|
} else {
|
|
rnn_control = NULL;
|
|
}
|
|
} else if (startswith(line, "fault-info:")) {
|
|
decode_fault_info();
|
|
} else if (startswith(line, "bos:")) {
|
|
decode_bos();
|
|
} else if (startswith(line, "ringbuffer:")) {
|
|
decode_ringbuffer();
|
|
} else if (startswith(line, "gmu-log:")) {
|
|
decode_gmu_log();
|
|
} else if (startswith(line, "gmu-hfi:")) {
|
|
decode_gmu_hfi();
|
|
} else if (startswith(line, "registers:")) {
|
|
decode_registers();
|
|
|
|
/* after we've recorded buffer contents, and CP register values,
|
|
* we can take a stab at decoding the cmdstream:
|
|
*/
|
|
dump_cmdstream();
|
|
} else if (startswith(line, "registers-gmu:")) {
|
|
decode_gmu_registers();
|
|
} else if (startswith(line, "indexed-registers:")) {
|
|
decode_indexed_registers();
|
|
} else if (startswith(line, "shader-blocks:")) {
|
|
decode_shader_blocks();
|
|
} else if (startswith(line, "clusters:")) {
|
|
decode_clusters();
|
|
} else if (startswith(line, "debugbus:")) {
|
|
decode_debugbus();
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Usage and argument parsing:
|
|
*/
|
|
|
|
static void
|
|
usage(void)
|
|
{
|
|
/* clang-format off */
|
|
fprintf(stderr, "Usage:\n\n"
|
|
"\tcrashdec [-achmsv] [-f FILE]\n\n"
|
|
"Options:\n"
|
|
"\t-a, --allregs - show all registers (including ones not written since\n"
|
|
"\t previous draw) at each draw\n"
|
|
"\t-c, --color - use colors\n"
|
|
"\t-f, --file=FILE - read input from specified file (rather than stdin)\n"
|
|
"\t-h, --help - this usage message\n"
|
|
"\t-m, --markers - try to decode CP_NOP string markers\n"
|
|
"\t-s, --summary - don't show individual register writes, but just show\n"
|
|
"\t register values on draws\n"
|
|
"\t-v, --verbose - dump more verbose output, including contents of\n"
|
|
"\t less interesting buffers\n"
|
|
"\n"
|
|
);
|
|
/* clang-format on */
|
|
exit(2);
|
|
}
|
|
|
|
/* clang-format off */
|
|
static const struct option opts[] = {
|
|
{ .name = "allregs", .has_arg = 0, NULL, 'a' },
|
|
{ .name = "color", .has_arg = 0, NULL, 'c' },
|
|
{ .name = "file", .has_arg = 1, NULL, 'f' },
|
|
{ .name = "help", .has_arg = 0, NULL, 'h' },
|
|
{ .name = "markers", .has_arg = 0, NULL, 'm' },
|
|
{ .name = "summary", .has_arg = 0, NULL, 's' },
|
|
{ .name = "verbose", .has_arg = 0, NULL, 'v' },
|
|
{}
|
|
};
|
|
/* clang-format on */
|
|
|
|
static bool interactive;
|
|
|
|
static void
|
|
cleanup(void)
|
|
{
|
|
fflush(stdout);
|
|
|
|
if (interactive) {
|
|
pager_close();
|
|
}
|
|
}
|
|
|
|
int
|
|
main(int argc, char **argv)
|
|
{
|
|
int c;
|
|
|
|
interactive = isatty(STDOUT_FILENO);
|
|
options.color = interactive;
|
|
|
|
/* default to read from stdin: */
|
|
in = stdin;
|
|
|
|
while ((c = getopt_long(argc, argv, "acf:hmsv", opts, NULL)) != -1) {
|
|
switch (c) {
|
|
case 'a':
|
|
options.allregs = true;
|
|
break;
|
|
case 'c':
|
|
options.color = true;
|
|
break;
|
|
case 'f':
|
|
in = fopen(optarg, "r");
|
|
break;
|
|
case 'm':
|
|
options.decode_markers = true;
|
|
break;
|
|
case 's':
|
|
options.summary = true;
|
|
break;
|
|
case 'v':
|
|
verbose = true;
|
|
break;
|
|
case 'h':
|
|
default:
|
|
usage();
|
|
}
|
|
}
|
|
|
|
disasm_a3xx_set_debug(PRINT_RAW);
|
|
|
|
if (interactive) {
|
|
pager_open();
|
|
}
|
|
|
|
atexit(cleanup);
|
|
|
|
decode();
|
|
cleanup();
|
|
}
|