mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-19 00:38:06 +02:00
d0dd5a5f57
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39093>
968 lines
33 KiB
C
968 lines
33 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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* Copyright 2024 Valve Corporation
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*
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* SPDX-License-Identifier: MIT
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*/
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#include "ac_gpu_info.h"
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#include "ac_formats.h"
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#include "ac_gpu_info.h"
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#include "sid.h"
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uint32_t
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ac_translate_buffer_numformat(const struct util_format_description *desc,
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int first_non_void)
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{
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if (desc->format == PIPE_FORMAT_R11G11B10_FLOAT)
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return V_008F0C_BUF_NUM_FORMAT_FLOAT;
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assert(first_non_void >= 0);
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switch (desc->channel[first_non_void].type) {
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case UTIL_FORMAT_TYPE_SIGNED:
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case UTIL_FORMAT_TYPE_FIXED:
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if (desc->channel[first_non_void].size >= 32 || desc->channel[first_non_void].pure_integer)
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return V_008F0C_BUF_NUM_FORMAT_SINT;
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else if (desc->channel[first_non_void].normalized)
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return V_008F0C_BUF_NUM_FORMAT_SNORM;
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else
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return V_008F0C_BUF_NUM_FORMAT_SSCALED;
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break;
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case UTIL_FORMAT_TYPE_UNSIGNED:
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if (desc->channel[first_non_void].size >= 32 || desc->channel[first_non_void].pure_integer)
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return V_008F0C_BUF_NUM_FORMAT_UINT;
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else if (desc->channel[first_non_void].normalized)
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return V_008F0C_BUF_NUM_FORMAT_UNORM;
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else
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return V_008F0C_BUF_NUM_FORMAT_USCALED;
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break;
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case UTIL_FORMAT_TYPE_FLOAT:
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default:
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return V_008F0C_BUF_NUM_FORMAT_FLOAT;
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}
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}
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uint32_t
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ac_translate_buffer_dataformat(const struct util_format_description *desc,
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int first_non_void)
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{
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int i;
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if (desc->format == PIPE_FORMAT_R11G11B10_FLOAT)
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return V_008F0C_BUF_DATA_FORMAT_10_11_11;
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assert(first_non_void >= 0);
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if (desc->nr_channels == 4 && desc->channel[0].size == 10 && desc->channel[1].size == 10 &&
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desc->channel[2].size == 10 && desc->channel[3].size == 2)
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return V_008F0C_BUF_DATA_FORMAT_2_10_10_10;
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/* See whether the components are of the same size. */
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for (i = 0; i < desc->nr_channels; i++) {
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if (desc->channel[first_non_void].size != desc->channel[i].size)
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return V_008F0C_BUF_DATA_FORMAT_INVALID;
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}
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switch (desc->channel[first_non_void].size) {
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case 8:
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switch (desc->nr_channels) {
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case 1:
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case 3: /* 3 loads */
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return V_008F0C_BUF_DATA_FORMAT_8;
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case 2:
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return V_008F0C_BUF_DATA_FORMAT_8_8;
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case 4:
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return V_008F0C_BUF_DATA_FORMAT_8_8_8_8;
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}
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break;
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case 16:
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switch (desc->nr_channels) {
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case 1:
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case 3: /* 3 loads */
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return V_008F0C_BUF_DATA_FORMAT_16;
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case 2:
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return V_008F0C_BUF_DATA_FORMAT_16_16;
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case 4:
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return V_008F0C_BUF_DATA_FORMAT_16_16_16_16;
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}
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break;
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case 32:
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switch (desc->nr_channels) {
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case 1:
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return V_008F0C_BUF_DATA_FORMAT_32;
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case 2:
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return V_008F0C_BUF_DATA_FORMAT_32_32;
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case 3:
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return V_008F0C_BUF_DATA_FORMAT_32_32_32;
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case 4:
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return V_008F0C_BUF_DATA_FORMAT_32_32_32_32;
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}
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break;
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case 64:
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/* Legacy double formats. */
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switch (desc->nr_channels) {
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case 1: /* 1 load */
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return V_008F0C_BUF_DATA_FORMAT_32_32;
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case 2: /* 1 load */
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return V_008F0C_BUF_DATA_FORMAT_32_32_32_32;
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case 3: /* 3 loads */
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return V_008F0C_BUF_DATA_FORMAT_32_32;
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case 4: /* 2 loads */
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return V_008F0C_BUF_DATA_FORMAT_32_32_32_32;
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}
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break;
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}
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return V_008F0C_BUF_DATA_FORMAT_INVALID;
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}
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uint32_t
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ac_translate_tex_numformat(const struct util_format_description *desc,
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int first_non_void)
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{
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uint32_t num_format;
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switch (desc->format) {
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case PIPE_FORMAT_S8_UINT_Z24_UNORM:
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num_format = V_008F14_IMG_NUM_FORMAT_UNORM;
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break;
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default:
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if (first_non_void < 0) {
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if (util_format_is_compressed(desc->format)) {
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switch (desc->format) {
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case PIPE_FORMAT_DXT1_SRGB:
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case PIPE_FORMAT_DXT1_SRGBA:
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case PIPE_FORMAT_DXT3_SRGBA:
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case PIPE_FORMAT_DXT5_SRGBA:
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case PIPE_FORMAT_BPTC_SRGBA:
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case PIPE_FORMAT_ETC2_SRGB8:
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case PIPE_FORMAT_ETC2_SRGB8A1:
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case PIPE_FORMAT_ETC2_SRGBA8:
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num_format = V_008F14_IMG_NUM_FORMAT_SRGB;
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break;
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case PIPE_FORMAT_RGTC1_SNORM:
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case PIPE_FORMAT_LATC1_SNORM:
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case PIPE_FORMAT_RGTC2_SNORM:
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case PIPE_FORMAT_LATC2_SNORM:
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case PIPE_FORMAT_ETC2_R11_SNORM:
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case PIPE_FORMAT_ETC2_RG11_SNORM:
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/* implies float, so use SNORM/UNORM to determine
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whether data is signed or not */
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case PIPE_FORMAT_BPTC_RGB_FLOAT:
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num_format = V_008F14_IMG_NUM_FORMAT_SNORM;
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break;
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default:
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num_format = V_008F14_IMG_NUM_FORMAT_UNORM;
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break;
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}
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} else if (desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED) {
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num_format = V_008F14_IMG_NUM_FORMAT_UNORM;
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} else {
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num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
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}
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} else if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) {
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num_format = V_008F14_IMG_NUM_FORMAT_SRGB;
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} else {
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switch (desc->channel[first_non_void].type) {
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case UTIL_FORMAT_TYPE_FLOAT:
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num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
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break;
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case UTIL_FORMAT_TYPE_SIGNED:
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if (desc->channel[first_non_void].normalized)
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num_format = V_008F14_IMG_NUM_FORMAT_SNORM;
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else if (desc->channel[first_non_void].pure_integer)
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num_format = V_008F14_IMG_NUM_FORMAT_SINT;
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else
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num_format = V_008F14_IMG_NUM_FORMAT_SSCALED;
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break;
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case UTIL_FORMAT_TYPE_UNSIGNED:
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if (desc->channel[first_non_void].normalized)
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num_format = V_008F14_IMG_NUM_FORMAT_UNORM;
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else if (desc->channel[first_non_void].pure_integer)
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num_format = V_008F14_IMG_NUM_FORMAT_UINT;
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else
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num_format = V_008F14_IMG_NUM_FORMAT_USCALED;
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break;
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default:
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num_format = V_008F14_IMG_NUM_FORMAT_UNORM;
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break;
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}
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}
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}
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return num_format;
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}
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uint32_t
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ac_translate_tex_dataformat(const struct radeon_info *info,
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const struct util_format_description *desc,
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int first_non_void)
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{
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bool uniform = true;
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int i;
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/* Colorspace (return non-RGB formats directly). */
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switch (desc->colorspace) {
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/* Depth stencil formats */
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case UTIL_FORMAT_COLORSPACE_ZS:
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switch (desc->format) {
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case PIPE_FORMAT_Z16_UNORM:
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return V_008F14_IMG_DATA_FORMAT_16;
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case PIPE_FORMAT_X24S8_UINT:
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case PIPE_FORMAT_S8X24_UINT:
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/*
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* Implemented as an 8_8_8_8 data format to fix texture
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* gathers in stencil sampling. This affects at least
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* GL45-CTS.texture_cube_map_array.sampling on GFX8.
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*/
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if (info->gfx_level <= GFX8)
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return V_008F14_IMG_DATA_FORMAT_8_8_8_8;
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if (desc->format == PIPE_FORMAT_X24S8_UINT)
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return V_008F14_IMG_DATA_FORMAT_8_24;
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else
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return V_008F14_IMG_DATA_FORMAT_24_8;
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case PIPE_FORMAT_Z24X8_UNORM:
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case PIPE_FORMAT_Z24_UNORM_S8_UINT:
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return V_008F14_IMG_DATA_FORMAT_8_24;
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case PIPE_FORMAT_X8Z24_UNORM:
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case PIPE_FORMAT_S8_UINT_Z24_UNORM:
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return V_008F14_IMG_DATA_FORMAT_24_8;
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case PIPE_FORMAT_S8_UINT:
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return V_008F14_IMG_DATA_FORMAT_8;
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case PIPE_FORMAT_Z32_FLOAT:
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return V_008F14_IMG_DATA_FORMAT_32;
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case PIPE_FORMAT_X32_S8X24_UINT:
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case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
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return V_008F14_IMG_DATA_FORMAT_X24_8_32;
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default:
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return ~0;
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}
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case UTIL_FORMAT_COLORSPACE_YUV:
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return ~0; /* TODO */
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default:
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break;
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}
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if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
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switch (desc->format) {
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case PIPE_FORMAT_RGTC1_SNORM:
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case PIPE_FORMAT_LATC1_SNORM:
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case PIPE_FORMAT_RGTC1_UNORM:
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case PIPE_FORMAT_LATC1_UNORM:
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return V_008F14_IMG_DATA_FORMAT_BC4;
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case PIPE_FORMAT_RGTC2_SNORM:
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case PIPE_FORMAT_LATC2_SNORM:
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case PIPE_FORMAT_RGTC2_UNORM:
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case PIPE_FORMAT_LATC2_UNORM:
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return V_008F14_IMG_DATA_FORMAT_BC5;
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default:
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return ~0;
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}
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}
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if (desc->layout == UTIL_FORMAT_LAYOUT_ETC) {
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switch (desc->format) {
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case PIPE_FORMAT_ETC1_RGB8:
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case PIPE_FORMAT_ETC2_RGB8:
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case PIPE_FORMAT_ETC2_SRGB8:
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return V_008F14_IMG_DATA_FORMAT_ETC2_RGB;
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case PIPE_FORMAT_ETC2_RGB8A1:
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case PIPE_FORMAT_ETC2_SRGB8A1:
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return V_008F14_IMG_DATA_FORMAT_ETC2_RGBA1;
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case PIPE_FORMAT_ETC2_RGBA8:
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case PIPE_FORMAT_ETC2_SRGBA8:
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return V_008F14_IMG_DATA_FORMAT_ETC2_RGBA;
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case PIPE_FORMAT_ETC2_R11_UNORM:
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case PIPE_FORMAT_ETC2_R11_SNORM:
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return V_008F14_IMG_DATA_FORMAT_ETC2_R;
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case PIPE_FORMAT_ETC2_RG11_UNORM:
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case PIPE_FORMAT_ETC2_RG11_SNORM:
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return V_008F14_IMG_DATA_FORMAT_ETC2_RG;
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default:
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break;
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}
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}
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if (desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
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switch (desc->format) {
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case PIPE_FORMAT_BPTC_RGBA_UNORM:
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case PIPE_FORMAT_BPTC_SRGBA:
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return V_008F14_IMG_DATA_FORMAT_BC7;
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case PIPE_FORMAT_BPTC_RGB_FLOAT:
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case PIPE_FORMAT_BPTC_RGB_UFLOAT:
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return V_008F14_IMG_DATA_FORMAT_BC6;
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default:
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return ~0;
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}
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}
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if (desc->layout == UTIL_FORMAT_LAYOUT_SUBSAMPLED) {
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switch (desc->format) {
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case PIPE_FORMAT_R8G8_B8G8_UNORM:
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case PIPE_FORMAT_G8R8_B8R8_UNORM:
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case PIPE_FORMAT_B8G8_R8G8_UNORM:
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return V_008F14_IMG_DATA_FORMAT_GB_GR;
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case PIPE_FORMAT_G8R8_G8B8_UNORM:
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case PIPE_FORMAT_R8G8_R8B8_UNORM:
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case PIPE_FORMAT_G8B8_G8R8_UNORM:
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return V_008F14_IMG_DATA_FORMAT_BG_RG;
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default:
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return ~0;
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}
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}
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if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
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switch (desc->format) {
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case PIPE_FORMAT_DXT1_RGB:
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case PIPE_FORMAT_DXT1_RGBA:
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case PIPE_FORMAT_DXT1_SRGB:
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case PIPE_FORMAT_DXT1_SRGBA:
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return V_008F14_IMG_DATA_FORMAT_BC1;
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case PIPE_FORMAT_DXT3_RGBA:
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case PIPE_FORMAT_DXT3_SRGBA:
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return V_008F14_IMG_DATA_FORMAT_BC2;
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case PIPE_FORMAT_DXT5_RGBA:
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case PIPE_FORMAT_DXT5_SRGBA:
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return V_008F14_IMG_DATA_FORMAT_BC3;
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default:
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return ~0;
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}
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}
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if (desc->format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
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return V_008F14_IMG_DATA_FORMAT_5_9_9_9;
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} else if (desc->format == PIPE_FORMAT_R11G11B10_FLOAT) {
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return V_008F14_IMG_DATA_FORMAT_10_11_11;
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}
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/* hw cannot support mixed formats (except depth/stencil, since only
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* depth is read).*/
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if (desc->is_mixed && desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
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return ~0;
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if (first_non_void < 0 || first_non_void > 3)
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return ~0;
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/* See whether the components are of the same size. */
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for (i = 1; i < desc->nr_channels; i++) {
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uniform = uniform && desc->channel[0].size == desc->channel[i].size;
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}
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/* Non-uniform formats. */
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if (!uniform) {
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switch (desc->nr_channels) {
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case 3:
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if (desc->channel[0].size == 5 && desc->channel[1].size == 6 &&
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desc->channel[2].size == 5) {
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return V_008F14_IMG_DATA_FORMAT_5_6_5;
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}
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return ~0;
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case 4:
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/* 5551 and 1555 UINT formats fail on Gfx8/Carrizo´. */
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if (info->family == CHIP_CARRIZO &&
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desc->channel[1].size == 5 &&
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desc->channel[2].size == 5 &&
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desc->channel[first_non_void].type == UTIL_FORMAT_TYPE_UNSIGNED &&
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desc->channel[first_non_void].pure_integer)
|
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return ~0;
|
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|
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if (desc->channel[0].size == 5 && desc->channel[1].size == 5 &&
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desc->channel[2].size == 5 && desc->channel[3].size == 1) {
|
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return V_008F14_IMG_DATA_FORMAT_1_5_5_5;
|
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}
|
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if (desc->channel[0].size == 1 && desc->channel[1].size == 5 &&
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desc->channel[2].size == 5 && desc->channel[3].size == 5) {
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return V_008F14_IMG_DATA_FORMAT_5_5_5_1;
|
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}
|
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if (desc->channel[0].size == 10 && desc->channel[1].size == 10 &&
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desc->channel[2].size == 10 && desc->channel[3].size == 2) {
|
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return V_008F14_IMG_DATA_FORMAT_2_10_10_10;
|
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}
|
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return ~0;
|
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}
|
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return ~0;
|
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}
|
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|
||
/* uniform formats */
|
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switch (desc->channel[first_non_void].size) {
|
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case 4:
|
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switch (desc->nr_channels) {
|
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case 4:
|
||
/* 4444 UINT formats fail on Gfx8/Carrizo´. */
|
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if (info->family == CHIP_CARRIZO &&
|
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desc->channel[first_non_void].type == UTIL_FORMAT_TYPE_UNSIGNED &&
|
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desc->channel[first_non_void].pure_integer)
|
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return ~0;
|
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|
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return V_008F14_IMG_DATA_FORMAT_4_4_4_4;
|
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}
|
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break;
|
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case 8:
|
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switch (desc->nr_channels) {
|
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case 1:
|
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return V_008F14_IMG_DATA_FORMAT_8;
|
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case 2:
|
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return V_008F14_IMG_DATA_FORMAT_8_8;
|
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case 4:
|
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return V_008F14_IMG_DATA_FORMAT_8_8_8_8;
|
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}
|
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break;
|
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case 16:
|
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switch (desc->nr_channels) {
|
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case 1:
|
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return V_008F14_IMG_DATA_FORMAT_16;
|
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case 2:
|
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return V_008F14_IMG_DATA_FORMAT_16_16;
|
||
case 4:
|
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return V_008F14_IMG_DATA_FORMAT_16_16_16_16;
|
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}
|
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break;
|
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case 32:
|
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switch (desc->nr_channels) {
|
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case 1:
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return V_008F14_IMG_DATA_FORMAT_32;
|
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case 2:
|
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return V_008F14_IMG_DATA_FORMAT_32_32;
|
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/* Not supported for render targets */
|
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case 3:
|
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return V_008F14_IMG_DATA_FORMAT_32_32_32;
|
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case 4:
|
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return V_008F14_IMG_DATA_FORMAT_32_32_32_32;
|
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}
|
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break;
|
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case 64:
|
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if (desc->channel[0].type != UTIL_FORMAT_TYPE_FLOAT && desc->nr_channels == 1)
|
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return V_008F14_IMG_DATA_FORMAT_32_32;
|
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break;
|
||
}
|
||
|
||
return ~0;
|
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}
|
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|
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unsigned
|
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ac_get_cb_format(enum amd_gfx_level gfx_level, enum pipe_format format)
|
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{
|
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const struct util_format_description *desc = util_format_description(format);
|
||
|
||
#define HAS_SIZE(x, y, z, w) \
|
||
(desc->channel[0].size == (x) && desc->channel[1].size == (y) && \
|
||
desc->channel[2].size == (z) && desc->channel[3].size == (w))
|
||
|
||
if (format == PIPE_FORMAT_R11G11B10_FLOAT) /* isn't plain */
|
||
return V_028C70_COLOR_10_11_11;
|
||
|
||
if (gfx_level >= GFX10_3 &&
|
||
format == PIPE_FORMAT_R9G9B9E5_FLOAT) /* isn't plain */
|
||
return V_028C70_COLOR_5_9_9_9;
|
||
|
||
if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
|
||
return V_028C70_COLOR_INVALID;
|
||
|
||
/* hw cannot support mixed formats (except depth/stencil, since
|
||
* stencil is not written to). */
|
||
if (desc->is_mixed && desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
|
||
return V_028C70_COLOR_INVALID;
|
||
|
||
int first_non_void = util_format_get_first_non_void_channel(format);
|
||
|
||
/* Reject SCALED formats because we don't implement them for CB. */
|
||
if (first_non_void >= 0 && first_non_void <= 3 &&
|
||
(desc->channel[first_non_void].type == UTIL_FORMAT_TYPE_UNSIGNED ||
|
||
desc->channel[first_non_void].type == UTIL_FORMAT_TYPE_SIGNED) &&
|
||
!desc->channel[first_non_void].normalized &&
|
||
!desc->channel[first_non_void].pure_integer)
|
||
return V_028C70_COLOR_INVALID;
|
||
|
||
switch (desc->nr_channels) {
|
||
case 1:
|
||
switch (desc->channel[0].size) {
|
||
case 8:
|
||
return V_028C70_COLOR_8;
|
||
case 16:
|
||
return V_028C70_COLOR_16;
|
||
case 32:
|
||
return V_028C70_COLOR_32;
|
||
case 64:
|
||
return V_028C70_COLOR_32_32;
|
||
}
|
||
break;
|
||
case 2:
|
||
if (desc->channel[0].size == desc->channel[1].size) {
|
||
switch (desc->channel[0].size) {
|
||
case 8:
|
||
return V_028C70_COLOR_8_8;
|
||
case 16:
|
||
return V_028C70_COLOR_16_16;
|
||
case 32:
|
||
return V_028C70_COLOR_32_32;
|
||
}
|
||
} else if (HAS_SIZE(8, 24, 0, 0)) {
|
||
return V_028C70_COLOR_24_8;
|
||
} else if (HAS_SIZE(24, 8, 0, 0)) {
|
||
return V_028C70_COLOR_8_24;
|
||
}
|
||
break;
|
||
case 3:
|
||
if (HAS_SIZE(5, 6, 5, 0)) {
|
||
return V_028C70_COLOR_5_6_5;
|
||
} else if (HAS_SIZE(32, 8, 24, 0)) {
|
||
return V_028C70_COLOR_X24_8_32_FLOAT;
|
||
}
|
||
break;
|
||
case 4:
|
||
if (desc->channel[0].size == desc->channel[1].size &&
|
||
desc->channel[0].size == desc->channel[2].size &&
|
||
desc->channel[0].size == desc->channel[3].size) {
|
||
switch (desc->channel[0].size) {
|
||
case 4:
|
||
return V_028C70_COLOR_4_4_4_4;
|
||
case 8:
|
||
return V_028C70_COLOR_8_8_8_8;
|
||
case 16:
|
||
return V_028C70_COLOR_16_16_16_16;
|
||
case 32:
|
||
return V_028C70_COLOR_32_32_32_32;
|
||
}
|
||
} else if (HAS_SIZE(5, 5, 5, 1)) {
|
||
return V_028C70_COLOR_1_5_5_5;
|
||
} else if (HAS_SIZE(1, 5, 5, 5)) {
|
||
return V_028C70_COLOR_5_5_5_1;
|
||
} else if (HAS_SIZE(10, 10, 10, 2)) {
|
||
return V_028C70_COLOR_2_10_10_10;
|
||
} else if (HAS_SIZE(2, 10, 10, 10)) {
|
||
return V_028C70_COLOR_10_10_10_2;
|
||
}
|
||
break;
|
||
}
|
||
return V_028C70_COLOR_INVALID;
|
||
}
|
||
|
||
unsigned ac_get_cb_number_type(enum pipe_format format)
|
||
{
|
||
const struct util_format_description *desc = util_format_description(format);
|
||
int chan = util_format_get_first_non_void_channel(format);
|
||
|
||
if (chan == -1 || desc->channel[chan].type == UTIL_FORMAT_TYPE_FLOAT) {
|
||
return V_028C70_NUMBER_FLOAT;
|
||
} else {
|
||
if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) {
|
||
return V_028C70_NUMBER_SRGB;
|
||
} else if (desc->channel[chan].type == UTIL_FORMAT_TYPE_SIGNED) {
|
||
return desc->channel[chan].pure_integer ? V_028C70_NUMBER_SINT : V_028C70_NUMBER_SNORM;
|
||
} else if (desc->channel[chan].type == UTIL_FORMAT_TYPE_UNSIGNED) {
|
||
return desc->channel[chan].pure_integer ? V_028C70_NUMBER_UINT : V_028C70_NUMBER_UNORM;
|
||
} else {
|
||
return V_028C70_NUMBER_UNORM;
|
||
}
|
||
}
|
||
}
|
||
|
||
unsigned
|
||
ac_translate_colorswap(enum amd_gfx_level gfx_level, enum pipe_format format, bool do_endian_swap)
|
||
{
|
||
const struct util_format_description *desc = util_format_description(format);
|
||
|
||
#define HAS_SWIZZLE(chan, swz) (desc->swizzle[chan] == PIPE_SWIZZLE_##swz)
|
||
|
||
if (format == PIPE_FORMAT_R11G11B10_FLOAT) /* isn't plain */
|
||
return V_028C70_SWAP_STD;
|
||
|
||
if (gfx_level >= GFX10_3 &&
|
||
format == PIPE_FORMAT_R9G9B9E5_FLOAT) /* isn't plain */
|
||
return V_028C70_SWAP_STD;
|
||
|
||
if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
|
||
return ~0U;
|
||
|
||
switch (desc->nr_channels) {
|
||
case 1:
|
||
if (HAS_SWIZZLE(0, X))
|
||
return V_028C70_SWAP_STD; /* X___ */
|
||
else if (HAS_SWIZZLE(3, X))
|
||
return V_028C70_SWAP_ALT_REV; /* ___X */
|
||
break;
|
||
case 2:
|
||
if ((HAS_SWIZZLE(0, X) && HAS_SWIZZLE(1, Y)) || (HAS_SWIZZLE(0, X) && HAS_SWIZZLE(1, NONE)) ||
|
||
(HAS_SWIZZLE(0, NONE) && HAS_SWIZZLE(1, Y)))
|
||
return V_028C70_SWAP_STD; /* XY__ */
|
||
else if ((HAS_SWIZZLE(0, Y) && HAS_SWIZZLE(1, X)) ||
|
||
(HAS_SWIZZLE(0, Y) && HAS_SWIZZLE(1, NONE)) ||
|
||
(HAS_SWIZZLE(0, NONE) && HAS_SWIZZLE(1, X)))
|
||
/* YX__ */
|
||
return (do_endian_swap ? V_028C70_SWAP_STD : V_028C70_SWAP_STD_REV);
|
||
else if (HAS_SWIZZLE(0, X) && HAS_SWIZZLE(3, Y))
|
||
return V_028C70_SWAP_ALT; /* X__Y */
|
||
else if (HAS_SWIZZLE(0, Y) && HAS_SWIZZLE(3, X))
|
||
return V_028C70_SWAP_ALT_REV; /* Y__X */
|
||
break;
|
||
case 3:
|
||
if (HAS_SWIZZLE(0, X))
|
||
return (do_endian_swap ? V_028C70_SWAP_STD_REV : V_028C70_SWAP_STD);
|
||
else if (HAS_SWIZZLE(0, Z))
|
||
return V_028C70_SWAP_STD_REV; /* ZYX */
|
||
break;
|
||
case 4:
|
||
/* check the middle channels, the 1st and 4th channel can be NONE */
|
||
if (HAS_SWIZZLE(1, Y) && HAS_SWIZZLE(2, Z)) {
|
||
return V_028C70_SWAP_STD; /* XYZW */
|
||
} else if (HAS_SWIZZLE(1, Z) && HAS_SWIZZLE(2, Y)) {
|
||
return V_028C70_SWAP_STD_REV; /* WZYX */
|
||
} else if (HAS_SWIZZLE(1, Y) && HAS_SWIZZLE(2, X)) {
|
||
return V_028C70_SWAP_ALT; /* ZYXW */
|
||
} else if (HAS_SWIZZLE(1, Z) && HAS_SWIZZLE(2, W)) {
|
||
/* YZWX */
|
||
if (desc->is_array)
|
||
return V_028C70_SWAP_ALT_REV;
|
||
else
|
||
return (do_endian_swap ? V_028C70_SWAP_ALT : V_028C70_SWAP_ALT_REV);
|
||
}
|
||
break;
|
||
}
|
||
return ~0U;
|
||
}
|
||
|
||
bool
|
||
ac_is_colorbuffer_format_supported(enum amd_gfx_level gfx_level, enum pipe_format format)
|
||
{
|
||
return ac_get_cb_format(gfx_level, format) != V_028C70_COLOR_INVALID &&
|
||
ac_translate_colorswap(gfx_level, format, false) != ~0U;
|
||
}
|
||
|
||
uint32_t
|
||
ac_colorformat_endian_swap(uint32_t colorformat)
|
||
{
|
||
if (UTIL_ARCH_BIG_ENDIAN) {
|
||
switch (colorformat) {
|
||
/* 8-bit buffers. */
|
||
case V_028C70_COLOR_8:
|
||
return V_028C70_ENDIAN_NONE;
|
||
|
||
/* 16-bit buffers. */
|
||
case V_028C70_COLOR_5_6_5:
|
||
case V_028C70_COLOR_1_5_5_5:
|
||
case V_028C70_COLOR_4_4_4_4:
|
||
case V_028C70_COLOR_16:
|
||
case V_028C70_COLOR_8_8:
|
||
return V_028C70_ENDIAN_8IN16;
|
||
|
||
/* 32-bit buffers. */
|
||
case V_028C70_COLOR_8_8_8_8:
|
||
case V_028C70_COLOR_2_10_10_10:
|
||
case V_028C70_COLOR_10_10_10_2:
|
||
case V_028C70_COLOR_8_24:
|
||
case V_028C70_COLOR_24_8:
|
||
case V_028C70_COLOR_16_16:
|
||
return V_028C70_ENDIAN_8IN32;
|
||
|
||
/* 64-bit buffers. */
|
||
case V_028C70_COLOR_16_16_16_16:
|
||
return V_028C70_ENDIAN_8IN16;
|
||
|
||
case V_028C70_COLOR_32_32:
|
||
return V_028C70_ENDIAN_8IN32;
|
||
|
||
/* 128-bit buffers. */
|
||
case V_028C70_COLOR_32_32_32_32:
|
||
return V_028C70_ENDIAN_8IN32;
|
||
default:
|
||
return V_028C70_ENDIAN_NONE; /* Unsupported. */
|
||
}
|
||
} else {
|
||
return V_028C70_ENDIAN_NONE;
|
||
}
|
||
}
|
||
|
||
uint32_t
|
||
ac_translate_dbformat(enum pipe_format format)
|
||
{
|
||
switch (format) {
|
||
case PIPE_FORMAT_Z16_UNORM:
|
||
case PIPE_FORMAT_Z16_UNORM_S8_UINT:
|
||
return V_028040_Z_16;
|
||
case PIPE_FORMAT_S8_UINT_Z24_UNORM:
|
||
case PIPE_FORMAT_X8Z24_UNORM:
|
||
case PIPE_FORMAT_Z24X8_UNORM:
|
||
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
|
||
return V_028040_Z_24; /* not present on GFX12 */
|
||
case PIPE_FORMAT_Z32_FLOAT:
|
||
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
|
||
return V_028040_Z_32_FLOAT;
|
||
default:
|
||
return V_028040_Z_INVALID;
|
||
}
|
||
}
|
||
|
||
bool
|
||
ac_is_zs_format_supported(enum pipe_format format)
|
||
{
|
||
return ac_translate_dbformat(format) != V_028040_Z_INVALID;
|
||
}
|
||
|
||
uint32_t
|
||
ac_border_color_swizzle(const struct util_format_description *desc)
|
||
{
|
||
unsigned bc_swizzle = V_008F20_BC_SWIZZLE_XYZW;
|
||
|
||
if (desc->format == PIPE_FORMAT_S8_UINT) {
|
||
/* Swizzle of 8-bit stencil format is defined as _x__ but the hw expects XYZW. */
|
||
assert(desc->swizzle[1] == PIPE_SWIZZLE_X);
|
||
return bc_swizzle;
|
||
}
|
||
|
||
if (desc->swizzle[3] == PIPE_SWIZZLE_X) {
|
||
/* For the pre-defined border color values (white, opaque
|
||
* black, transparent black), the only thing that matters is
|
||
* that the alpha channel winds up in the correct place
|
||
* (because the RGB channels are all the same) so either of
|
||
* these enumerations will work.
|
||
*/
|
||
if (desc->swizzle[2] == PIPE_SWIZZLE_Y)
|
||
bc_swizzle = V_008F20_BC_SWIZZLE_WZYX;
|
||
else
|
||
bc_swizzle = V_008F20_BC_SWIZZLE_WXYZ;
|
||
} else if (desc->swizzle[0] == PIPE_SWIZZLE_X) {
|
||
if (desc->swizzle[1] == PIPE_SWIZZLE_Y)
|
||
bc_swizzle = V_008F20_BC_SWIZZLE_XYZW;
|
||
else
|
||
bc_swizzle = V_008F20_BC_SWIZZLE_XWYZ;
|
||
} else if (desc->swizzle[1] == PIPE_SWIZZLE_X) {
|
||
bc_swizzle = V_008F20_BC_SWIZZLE_YXWZ;
|
||
} else if (desc->swizzle[2] == PIPE_SWIZZLE_X) {
|
||
bc_swizzle = V_008F20_BC_SWIZZLE_ZYXW;
|
||
}
|
||
|
||
return bc_swizzle;
|
||
}
|
||
|
||
/** Linearize and convert luminance/intensity to red. */
|
||
enum pipe_format
|
||
ac_simplify_cb_format(enum pipe_format format)
|
||
{
|
||
format = util_format_linear(format);
|
||
format = util_format_luminance_to_red(format);
|
||
return util_format_intensity_to_red(format);
|
||
}
|
||
|
||
bool
|
||
ac_alpha_is_on_msb(const struct radeon_info *info, enum pipe_format format)
|
||
{
|
||
if (info->gfx_level >= GFX11)
|
||
return false;
|
||
|
||
format = ac_simplify_cb_format(format);
|
||
const struct util_format_description *desc = util_format_description(format);
|
||
unsigned comp_swap = ac_translate_colorswap(info->gfx_level, format, false);
|
||
|
||
/* The following code matches the hw behavior. */
|
||
if (desc->nr_channels == 1) {
|
||
return (comp_swap == V_028C70_SWAP_ALT_REV) != (info->family == CHIP_RAVEN2 ||
|
||
info->family == CHIP_RENOIR);
|
||
}
|
||
|
||
return comp_swap != V_028C70_SWAP_STD_REV && comp_swap != V_028C70_SWAP_ALT_REV;
|
||
}
|
||
|
||
/* GFX6-8:
|
||
* - no integer format support
|
||
* - no depth format support (depth formats without shadow samplers are supported,
|
||
* but that's not enough)
|
||
* - only single-channel formats are supported
|
||
* - limitations of early chips (GFX6 only): no R9G9B9E5 support
|
||
*
|
||
* GFX9+:
|
||
* - all formats are supported
|
||
*/
|
||
bool
|
||
ac_is_reduction_mode_supported(const struct radeon_info *info, enum pipe_format format,
|
||
bool shadow_samplers)
|
||
{
|
||
const struct util_format_description *desc = util_format_description(format);
|
||
|
||
if (info->gfx_level <= GFX8) {
|
||
/* old HW limitations */
|
||
if (info->gfx_level == GFX6 && format == PIPE_FORMAT_R9G9B9E5_FLOAT)
|
||
return false;
|
||
|
||
/* reject if more than one channel */
|
||
if (desc->nr_channels > 1)
|
||
return false;
|
||
|
||
/* no integer or depth format support */
|
||
if (util_format_is_pure_integer(format) ||
|
||
(shadow_samplers && util_format_has_depth(desc)))
|
||
return false;
|
||
}
|
||
|
||
return true;
|
||
}
|
||
|
||
void
|
||
ac_set_sx_downconvert_state_for_mrt(enum amd_gfx_level gfx_level, bool is_null, unsigned cb_color_info,
|
||
unsigned cb_color_attrib, unsigned spi_shader_col_format,
|
||
unsigned cb_target_mask, unsigned mrt_index,
|
||
uint32_t *sx_ps_downconvert, uint32_t *sx_blend_opt_epsilon,
|
||
uint32_t *sx_blend_opt_control, uint32_t *fix_cb_target_mask)
|
||
{
|
||
if (is_null) {
|
||
/* If the color buffer is not set, the driver sets 32_R as the SPI color format, because
|
||
* the HW doesn't allow holes between color outputs, so also set this to enable RB+.
|
||
*/
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_32_R << (mrt_index * 4);
|
||
return;
|
||
}
|
||
|
||
unsigned cb_format = gfx_level >= GFX11 ? G_028C70_FORMAT_GFX11(cb_color_info):
|
||
G_028C70_FORMAT_GFX6(cb_color_info);
|
||
unsigned cb_swap = G_028C70_COMP_SWAP(cb_color_info);
|
||
unsigned spi_format = (spi_shader_col_format >> (mrt_index * 4)) & 0xf;
|
||
unsigned colormask = (cb_target_mask >> (mrt_index * 4)) & 0xf;
|
||
|
||
/* Set if RGB and A are present. */
|
||
bool has_alpha = !(gfx_level >= GFX11 ? G_028C74_FORCE_DST_ALPHA_1_GFX11(cb_color_attrib):
|
||
G_028C74_FORCE_DST_ALPHA_1_GFX6(cb_color_attrib));
|
||
bool has_rgb;
|
||
|
||
if (cb_format == V_028C70_COLOR_8 || cb_format == V_028C70_COLOR_16 || cb_format == V_028C70_COLOR_32)
|
||
has_rgb = !has_alpha;
|
||
else
|
||
has_rgb = true;
|
||
|
||
/* Check the colormask and export format. */
|
||
if (!(colormask & PIPE_MASK_RGB))
|
||
has_rgb = false;
|
||
if (!(colormask & PIPE_MASK_A))
|
||
has_alpha = false;
|
||
|
||
if (spi_format == V_028714_SPI_SHADER_ZERO) {
|
||
has_rgb = false;
|
||
has_alpha = false;
|
||
}
|
||
|
||
/* Disable value checking for disabled channels during SX blend optimizations (determining
|
||
* BLEND_BYPASS and DISCARD). These bits modify how BLEND_BYPASS and DISCARD are determined.
|
||
*
|
||
* When both DISABLE bits are set, the behavior is BLEND_BYPASS. When colormask is
|
||
* also 0, the SX export format must still be set, and then it behaves like DISCARD.
|
||
*
|
||
* When any DISABLE bit is not set, those components must succeed the corresponding MRTi blend
|
||
* opt test to get BLEND_BYPASS or DISCARD.
|
||
*/
|
||
if (!has_rgb)
|
||
*sx_blend_opt_control |= S_02875C_MRT0_COLOR_OPT_DISABLE(1) << (mrt_index * 4);
|
||
if (!has_alpha)
|
||
*sx_blend_opt_control |= S_02875C_MRT0_ALPHA_OPT_DISABLE(1) << (mrt_index * 4);
|
||
|
||
/* Enable export down-conversion for 32bpp and smaller formats, also called RB+, required
|
||
* for optimal pixel throughput. If this function doesn't set anything (the value stays at
|
||
* SX_RT_EXPORT_NO_CONVERSION=0), the pixel throughput will be the same as 64bpp.
|
||
*/
|
||
bool export_format_is_fp16 = spi_format == V_028714_SPI_SHADER_FP16_ABGR;
|
||
bool export_format_is_int16 = spi_format == V_028714_SPI_SHADER_UINT16_ABGR ||
|
||
spi_format == V_028714_SPI_SHADER_SINT16_ABGR;
|
||
bool export_format_is_norm16 = spi_format == V_028714_SPI_SHADER_UNORM16_ABGR ||
|
||
spi_format == V_028714_SPI_SHADER_SNORM16_ABGR;
|
||
|
||
switch (cb_format) {
|
||
case V_028C70_COLOR_8:
|
||
case V_028C70_COLOR_8_8:
|
||
case V_028C70_COLOR_8_8_8_8:
|
||
if (export_format_is_fp16 || export_format_is_int16) {
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_8_8_8_8 << (mrt_index * 4);
|
||
if (G_028C70_NUMBER_TYPE(cb_color_info) != V_028C70_NUMBER_SRGB)
|
||
*sx_blend_opt_epsilon |= V_028758_8BIT_FORMAT_0_5 << (mrt_index * 4);
|
||
}
|
||
break;
|
||
|
||
case V_028C70_COLOR_16:
|
||
case V_028C70_COLOR_16_16:
|
||
/* For 1-channel formats, use the superset thereof. */
|
||
if (export_format_is_fp16 || export_format_is_int16 || export_format_is_norm16) {
|
||
if (cb_swap == V_028C70_SWAP_STD || cb_swap == V_028C70_SWAP_STD_REV)
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_16_16_GR << (mrt_index * 4);
|
||
else
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_16_16_AR << (mrt_index * 4);
|
||
}
|
||
break;
|
||
|
||
case V_028C70_COLOR_32:
|
||
if (cb_swap == V_028C70_SWAP_STD && spi_format == V_028714_SPI_SHADER_32_R)
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_32_R << (mrt_index * 4);
|
||
else if (cb_swap == V_028C70_SWAP_ALT_REV && spi_format == V_028714_SPI_SHADER_32_AR)
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_32_A << (mrt_index * 4);
|
||
break;
|
||
|
||
case V_028C70_COLOR_5_6_5:
|
||
if (export_format_is_fp16) {
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_5_6_5 << (mrt_index * 4);
|
||
*sx_blend_opt_epsilon |= V_028758_6BIT_FORMAT_0_5 << (mrt_index * 4);
|
||
}
|
||
break;
|
||
|
||
case V_028C70_COLOR_1_5_5_5:
|
||
case V_028C70_COLOR_5_5_5_1:
|
||
if (export_format_is_fp16) {
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_1_5_5_5 << (mrt_index * 4);
|
||
*sx_blend_opt_epsilon |= V_028758_5BIT_FORMAT_0_5 << (mrt_index * 4);
|
||
}
|
||
break;
|
||
|
||
case V_028C70_COLOR_4_4_4_4:
|
||
if (export_format_is_fp16) {
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_4_4_4_4 << (mrt_index * 4);
|
||
*sx_blend_opt_epsilon |= V_028758_4BIT_FORMAT_0_5 << (mrt_index * 4);
|
||
}
|
||
break;
|
||
|
||
case V_028C70_COLOR_10_11_11:
|
||
case V_028C70_COLOR_11_11_10:
|
||
if (export_format_is_fp16)
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_10_11_11 << (mrt_index * 4);
|
||
break;
|
||
|
||
case V_028C70_COLOR_2_10_10_10:
|
||
case V_028C70_COLOR_10_10_10_2:
|
||
if (export_format_is_fp16 || export_format_is_int16) {
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_2_10_10_10 << (mrt_index * 4);
|
||
*sx_blend_opt_epsilon |= V_028758_10BIT_FORMAT_0_5 << (mrt_index * 4);
|
||
}
|
||
break;
|
||
|
||
case V_028C70_COLOR_5_9_9_9:
|
||
/* This only executes on GFX10.3+. */
|
||
assert(gfx_level >= GFX10_3);
|
||
|
||
if (export_format_is_fp16) {
|
||
if (gfx_level >= GFX12) {
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_9_9_9_E5 << (mrt_index * 4);
|
||
} else {
|
||
/* GFX10.3-11 have a bug where R9G9B9E5 is broken with RB+ when the color mask is neither
|
||
* full nor empty.
|
||
*
|
||
* If A is missing in the color mask, add it. If it's the only bit set, remove it.
|
||
*/
|
||
if (fix_cb_target_mask) {
|
||
if (colormask == PIPE_MASK_RGB) {
|
||
colormask |= PIPE_MASK_A;
|
||
*fix_cb_target_mask |= PIPE_MASK_A << (mrt_index * 4);
|
||
} else if (colormask == PIPE_MASK_A) {
|
||
colormask = 0;
|
||
*fix_cb_target_mask &= ~(PIPE_MASK_A << (mrt_index * 4));
|
||
}
|
||
}
|
||
|
||
/* Don't enable RB+ if the color mask is not full or empty, which is done by not
|
||
* setting SX_PS_DOWNCONVERT for that MRT. Even if the color mask is 0, we should
|
||
* still set a non-zero export format to make sure the pixels are discarded quickly.
|
||
*/
|
||
if (colormask == PIPE_MASK_RGBA || colormask == 0)
|
||
*sx_ps_downconvert |= V_028754_SX_RT_EXPORT_9_9_9_E5 << (mrt_index * 4);
|
||
}
|
||
}
|
||
break;
|
||
}
|
||
}
|