Ruijing Dong 74bd5bbf28 radeonsi/vcn: update av1 decoding to support vcn4 ... Apply changes of vcn4 on av1 decoding. Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>		2022-05-10 04:29:55 +00:00
..
addrlib	amd: add chip identification for gfx1100-1103	2022-05-10 04:29:55 +00:00
ci	ci: Fix tests expectations	2022-05-04 23:39:15 +00:00
common	radeonsi/vcn: update av1 decoding to support vcn4	2022-05-10 04:29:55 +00:00
compiler	aco: fix cmpswap global atomic definition on GFX6	2022-05-10 01:01:13 +00:00
drm-shim	Use proper types for meson objects	2022-04-18 13:03:08 +03:00
llvm	amd: add chip identification for gfx1100-1103	2022-05-10 04:29:55 +00:00
registers	amd: add gfx11 to packet definitions	2022-05-10 04:29:54 +00:00
vulkan	radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there	2022-05-10 04:29:55 +00:00
.clang-format	radv: allow holes in inline push constants	2022-04-12 11:44:30 +00:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00