mesa/src/intel/decoder
Felix DeGrood 7a3de9e877 intel/brw: support for dumping shader line numbers
Add support for dumping shader asm containing instruction line numbers
matching offsets within instruction state pool buffer. Offsets
should match values collected from eu stall sampling. This is
required for match eu stall data with individual shader instructions.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30142>
2025-04-08 19:39:53 +00:00
..
tests
intel_batch_decoder.c intel/decoder: Decode compute shaders in EXECUTE_INDIRECT_DISPATCH 2025-03-25 23:26:40 +00:00
intel_batch_decoder_brw.c intel/brw: support for dumping shader line numbers 2025-04-08 19:39:53 +00:00
intel_batch_decoder_elk.c intel/decoder: Add ELK support 2024-02-24 00:24:31 +00:00
intel_batch_decoder_stub.c intel/decoder: Add ELK support 2024-02-24 00:24:31 +00:00
intel_decoder.c intel/decoder: free memory in error case 2025-04-02 19:26:55 +00:00
intel_decoder.h intel/decoder: add filter feature 2024-09-25 12:51:07 +00:00
intel_decoder_private.h intel/decoder: Add ELK support 2024-02-24 00:24:31 +00:00
meson.build intel: Add meson option -Dintel-elk 2025-01-30 00:45:59 +00:00