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8a5ac96a67
The previous commit enable different command buffers to program the same 3DSTATE_BINDING_TABLE_POOL_ALLOC instruction even though they allocated different chunks of binding tables. Now we can just predicate this programming and skip the stalling, flushing & invalidation. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39527>
47 lines
1.8 KiB
C
47 lines
1.8 KiB
C
/* Copyright © 2024 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#pragma once
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/* We reserve :
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* - GPR 12 for 3DSTATE_BINDING_TABLE_POOL_ALLOC address
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* - GPR 13 for STATE_BASE_ADDRESS bindless surface base address
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* - GPR 14 for perf queries
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* - GPR 15 for conditional rendering
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*/
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#define MI_BUILDER_NUM_ALLOC_GPRS 12
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#ifndef MI_BUILDER_CAN_WRITE_BATCH
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#define MI_BUILDER_CAN_WRITE_BATCH true
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#endif
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/* Don't do any write check by default, we manually set it where it matters.
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*/
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#define MI_BUILDER_DEFAULT_WRITE_CHECK false
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#define __gen_get_batch_dwords anv_batch_emit_dwords
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#define __gen_address_offset anv_address_add
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#define __gen_get_batch_address(b, a) anv_batch_address(b, a)
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#define __gen_get_write_fencing_status(b) (&(b)->write_fence_status)
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#include "common/mi_builder.h"
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/* We reserve this MI ALU register for the purpose of handling predication.
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* Other code which uses the MI ALU should leave it alone.
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*/
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#define ANV_PREDICATE_RESULT_REG 0x2678 /* MI_ALU_REG15 */
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/* We reserve this MI ALU register to pass around an offset computed from
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* VkPerformanceQuerySubmitInfoKHR::counterPassIndex VK_KHR_performance_query.
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* Other code which uses the MI ALU should leave it alone.
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*/
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#define ANV_PERF_QUERY_OFFSET_REG 0x2670 /* MI_ALU_REG14 */
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/* We reserve this MI ALU register to hold the last programmed bindless
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* surface state base address so that we can predicate STATE_BASE_ADDRESS
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* emissions if the address doesn't change.
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*/
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#define ANV_BINDLESS_SURFACE_BASE_ADDR_REG 0x2668 /* MI_ALU_REG13 */
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/* We reserve this MI ALU register to hold the last programmed
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* 3DSTATE_BINDING_TABLE_POOL_ALLOC address so that we can predicate
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* 3DSTATE_BINDING_TABLE_POOL_ALLOC emissions if the address doesn't change.
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*/
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#define ANV_BTP_ADDR_REG 0x2660 /* MI_ALU_REG12 */
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