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13bf1a4008
Applications often miss emitting barriers between a shader initializing data & another shader writing data in the same location afterward. This is very common for UAVs (see vkd3d-proton). Vkd3d-proton does a pretty good job as inserting missing barriers between UAV clears & writes. But some applications also have similar issues with custom shaders. Here we introduce an analysis pass that recognize shaders doing clear/initialization. We'll use that information in the following commit to insert barriers after those shaders. Since Gfx12.5 our HW has become a lot more sensitive to those issues due to the introduction of an L1 untyped data cache that is not coherent across the shader units. On Gfx20+, typed data is also L1 cacheable exposing even more issues. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Cc: mesa-stable Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40187>
98 lines
2.7 KiB
C
98 lines
2.7 KiB
C
/* Copyright © 2026 Intel Corporation
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* SPDX-License-Identifier: MIT
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*/
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#include "anv_private.h"
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#include "anv_nir.h"
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#include "nir/nir_builder.h"
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/**
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* This file implements an analysis pass to detect shaders we assume are
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* clearing/initializing some memory.
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*
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* The criteria for such shader is that all memory store operations are
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* writing constant values.
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*/
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struct clear_state {
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uint32_t n_image_store;
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uint32_t n_image_store_const;
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uint32_t n_ssbo_store;
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uint32_t n_ssbo_store_const;
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uint32_t n_global_store;
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uint32_t n_global_store_const;
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};
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static bool
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intrin_analysis(nir_builder *b, nir_intrinsic_instr *intrin, void *data)
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{
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struct clear_state *state = data;
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switch (intrin->intrinsic) {
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case nir_intrinsic_image_store:
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case nir_intrinsic_bindless_image_store:
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state->n_image_store++;
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if (nir_src_is_const(intrin->src[nir_get_io_data_src_number(intrin)]))
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state->n_image_store_const++;
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return true;
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case nir_intrinsic_image_atomic:
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case nir_intrinsic_image_atomic_swap:
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case nir_intrinsic_bindless_image_atomic:
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case nir_intrinsic_bindless_image_atomic_swap:
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state->n_image_store++;
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return true;
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case nir_intrinsic_store_ssbo:
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state->n_ssbo_store++;
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if (nir_src_is_const(intrin->src[nir_get_io_data_src_number(intrin)]))
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state->n_ssbo_store_const++;
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return true;
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case nir_intrinsic_ssbo_atomic:
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state->n_ssbo_store++;
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return true;
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case nir_intrinsic_store_global:
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state->n_global_store++;
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if (nir_src_is_const(intrin->src[nir_get_io_data_src_number(intrin)]))
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state->n_global_store_const++;
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return true;
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case nir_intrinsic_global_atomic:
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state->n_global_store++;
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return true;
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default:
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return false;
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}
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}
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enum anv_pipeline_behavior
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anv_nir_clear_shader_analysis(nir_shader *shader)
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{
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struct clear_state state = {};
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nir_shader_intrinsics_pass(shader, intrin_analysis, nir_metadata_all, &state);
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/* If something doesn't write a constant, assume no behavior. */
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if (state.n_image_store != state.n_image_store_const ||
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state.n_ssbo_store != state.n_ssbo_store_const ||
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state.n_global_store != state.n_global_store_const)
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return 0;
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enum anv_pipeline_behavior behavior = 0;
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if (state.n_image_store > 0 &&
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state.n_image_store == state.n_image_store_const)
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behavior |= ANV_PIPELINE_BEHAVIOR_CLEAR_TYPED;
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if (state.n_ssbo_store > 0 &&
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state.n_ssbo_store == state.n_ssbo_store_const)
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behavior |= ANV_PIPELINE_BEHAVIOR_CLEAR_UNTYPED;
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if (state.n_global_store > 0 &&
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state.n_global_store == state.n_global_store_const)
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behavior |= ANV_PIPELINE_BEHAVIOR_CLEAR_UNTYPED;
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return behavior;
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}
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