mesa/src/intel
Lionel Landwerlin 8baacba4d6 hasvk: remove coarse pixel checks
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19852>
2022-12-02 09:18:17 +00:00
..
blorp blorp: support negative offsets in addresses 2022-11-23 14:37:19 +00:00
ci ci: Add intel kbl xfail to flake 2022-11-30 17:24:03 +00:00
common intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument 2022-11-23 16:57:23 +00:00
compiler intel/nir/rt: switch to workgroup_id_zero_base 2022-12-02 05:25:22 +00:00
dev intel/dev: Add (disabled) device info for MTL 2022-12-01 16:22:47 +00:00
ds meson: do not use source_root() when possible 2022-11-22 06:11:07 +00:00
genxml genxml: forbid usage of L1CC_WBP/L1CC_UC for stateless messages 2022-11-23 06:54:04 +00:00
isl isl: don't report I915_FORMAT_MOD_Y_TILED_CCS on Gfx8 2022-12-02 09:18:16 +00:00
nullhw-layer utils: Merge util/debug.* into util/u_debug.* and remove util/debug.* 2022-11-02 07:25:39 +00:00
perf intel: Disable SSE2 instruction set if building for non x86 architectures 2022-11-23 16:57:23 +00:00
tools intel: Add SUPPORT_INTEL_INTEGRATED_GPUS build argument 2022-11-23 16:57:23 +00:00
vulkan anv: Drop anv_nir_add_base_work_group_id() 2022-12-01 04:56:48 +00:00
vulkan_hasvk hasvk: remove coarse pixel checks 2022-12-02 09:18:17 +00:00
meson.build intel: Disable SSE2 instruction set if building for non x86 architectures 2022-11-23 16:57:23 +00:00