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Now that Intel and R600 both do their own modifier propagation, the only backends that still lower modifiers in NIR are: * nir-to-tgsi * lima * etnaviv * a2xx The latter 3 backends do not support integers, and certainly do not support fp64. So they don't use these. TGSI in theory supports integer negate modifiers but NTT doesn't use them, so they're unused there too. Since they're unused, we remove NIR support for integer and 64-bit modifiers, leaving only 16/32-bit float modifiers. This will reduce the scope needed for a replacement to NIR modifiers, being pursued in !23089. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com> Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23782>
195 lines
6 KiB
C
195 lines
6 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_builder.h"
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/*
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* This pass lowers the neg, abs, and sat operations to source modifiers on
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* ALU operations to make things nicer for the backend. It's just much
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* easier to not have them when we're doing optimizations.
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*/
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static void
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alu_src_consume_abs(nir_alu_src *src)
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{
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src->abs = true;
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}
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static void
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alu_src_consume_negate(nir_alu_src *src)
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{
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/* If abs is set on the source, the negate goes away */
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if (!src->abs)
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src->negate = !src->negate;
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}
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static bool
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nir_lower_to_source_mods_instr(nir_builder *b, nir_instr *instr,
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void *data)
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{
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nir_lower_to_source_mods_flags options =
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*((nir_lower_to_source_mods_flags*) data);
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bool progress = false;
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if (instr->type != nir_instr_type_alu)
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return false;
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nir_alu_instr *alu = nir_instr_as_alu(instr);
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bool lower_abs = (nir_op_infos[alu->op].num_inputs < 3) ||
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(options & nir_lower_triop_abs);
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for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
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if (!alu->src[i].src.is_ssa)
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continue;
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if (alu->src[i].src.ssa->parent_instr->type != nir_instr_type_alu)
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continue;
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nir_alu_instr *parent = nir_instr_as_alu(alu->src[i].src.ssa->parent_instr);
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if (parent->dest.saturate)
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continue;
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if (nir_alu_type_get_base_type(nir_op_infos[alu->op].input_types[i]) != nir_type_float)
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continue;
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if (!(parent->op == nir_op_fabs && (options & nir_lower_fabs_source_mods)) &&
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!(parent->op == nir_op_fneg && (options & nir_lower_fneg_source_mods))) {
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continue;
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}
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if (nir_src_bit_size(alu->src[i].src) == 64)
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continue;
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/* We can only do a rewrite if the source we are copying is SSA.
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* Otherwise, moving the read might invalidly reorder reads/writes
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* on a register.
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*/
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if (!parent->src[0].src.is_ssa)
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continue;
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if (!lower_abs && (parent->op == nir_op_fabs || parent->src[0].abs))
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continue;
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nir_instr_rewrite_src(instr, &alu->src[i].src, parent->src[0].src);
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/* Apply any modifiers that come from the parent opcode */
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if (parent->op == nir_op_fneg)
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alu_src_consume_negate(&alu->src[i]);
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if (parent->op == nir_op_fabs)
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alu_src_consume_abs(&alu->src[i]);
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/* Apply modifiers from the parent source */
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if (parent->src[0].negate)
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alu_src_consume_negate(&alu->src[i]);
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if (parent->src[0].abs)
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alu_src_consume_abs(&alu->src[i]);
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for (int j = 0; j < 4; ++j) {
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if (!nir_alu_instr_channel_used(alu, i, j))
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continue;
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alu->src[i].swizzle[j] = parent->src[0].swizzle[alu->src[i].swizzle[j]];
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}
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if (nir_ssa_def_is_unused(&parent->dest.dest.ssa))
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nir_instr_remove(&parent->instr);
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progress = true;
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}
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/* We've covered sources. Now we're going to try and saturate the
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* destination if we can.
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*/
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if (!alu->dest.dest.is_ssa)
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return progress;
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if (nir_dest_bit_size(alu->dest.dest) == 64)
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return progress;
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/* We can only saturate float destinations */
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if (nir_alu_type_get_base_type(nir_op_infos[alu->op].output_type) !=
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nir_type_float)
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return progress;
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bool all_children_are_sat = true;
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nir_foreach_use_including_if(child_src, &alu->dest.dest.ssa) {
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if (child_src->is_if) {
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all_children_are_sat = false;
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break;
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}
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assert(child_src->is_ssa);
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nir_instr *child = child_src->parent_instr;
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if (child->type != nir_instr_type_alu) {
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all_children_are_sat = false;
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continue;
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}
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nir_alu_instr *child_alu = nir_instr_as_alu(child);
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if (child_alu->src[0].negate || child_alu->src[0].abs) {
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all_children_are_sat = false;
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continue;
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}
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if (child_alu->op != nir_op_fsat) {
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all_children_are_sat = false;
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continue;
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}
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}
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if (!all_children_are_sat)
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return progress;
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alu->dest.saturate = true;
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progress = true;
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nir_foreach_use(child_src, &alu->dest.dest.ssa) {
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assert(child_src->is_ssa);
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nir_alu_instr *child_alu = nir_instr_as_alu(child_src->parent_instr);
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child_alu->op = nir_op_mov;
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child_alu->dest.saturate = false;
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/* We could propagate the dest of our instruction to the
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* destinations of the uses here. However, one quick round of
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* copy propagation will clean that all up and then we don't have
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* the complexity.
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*/
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}
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return progress;
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}
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bool
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nir_lower_to_source_mods(nir_shader *shader,
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nir_lower_to_source_mods_flags options)
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{
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return nir_shader_instructions_pass(shader,
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nir_lower_to_source_mods_instr,
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nir_metadata_block_index |
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nir_metadata_dominance,
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&options);
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}
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