mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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b76420be1f
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12208>
271 lines
11 KiB
C
271 lines
11 KiB
C
/*
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* Copyright (C) 2021 Collabora, Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#include <stdio.h>
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#include "pan_bo.h"
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#include "pan_shader.h"
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#include "pan_scoreboard.h"
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#include "pan_encoder.h"
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#include "pan_indirect_dispatch.h"
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#include "pan_pool.h"
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#include "pan_util.h"
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#include "panfrost-quirks.h"
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#include "compiler/nir/nir_builder.h"
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#include "util/u_memory.h"
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#include "util/macros.h"
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struct indirect_dispatch_inputs {
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mali_ptr job;
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mali_ptr indirect_dim;
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mali_ptr num_wg_sysval[3];
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};
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static nir_ssa_def *
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get_input_data(nir_builder *b, unsigned offset, unsigned size)
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{
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assert(!(offset & 0x3));
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assert(size && !(size & 0x3));
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return nir_load_ubo(b, 1, size,
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nir_imm_int(b, 0),
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nir_imm_int(b, offset),
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.align_mul = 4,
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.align_offset = 0,
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.range_base = 0,
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.range = ~0);
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}
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#define get_input_field(b, name) \
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get_input_data(b, offsetof(struct indirect_dispatch_inputs, name), \
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sizeof(((struct indirect_dispatch_inputs *)0)->name) * 8)
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static mali_ptr
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get_rsd(const struct panfrost_device *dev)
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{
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return dev->indirect_dispatch.descs->ptr.gpu;
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}
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static mali_ptr
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get_tls(const struct panfrost_device *dev)
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{
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return dev->indirect_dispatch.descs->ptr.gpu +
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pan_size(RENDERER_STATE);
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}
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static mali_ptr
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get_ubos(struct pan_pool *pool,
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const struct indirect_dispatch_inputs *inputs)
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{
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struct panfrost_ptr inputs_buf =
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pan_pool_alloc_aligned(pool, ALIGN_POT(sizeof(*inputs), 16), 16);
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memcpy(inputs_buf.cpu, inputs, sizeof(*inputs));
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struct panfrost_ptr ubos_buf =
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pan_pool_alloc_desc(pool, UNIFORM_BUFFER);
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pan_pack(ubos_buf.cpu, UNIFORM_BUFFER, cfg) {
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cfg.entries = DIV_ROUND_UP(sizeof(*inputs), 16);
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cfg.pointer = inputs_buf.gpu;
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}
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return ubos_buf.gpu;
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}
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static mali_ptr
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get_push_uniforms(struct pan_pool *pool,
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const struct indirect_dispatch_inputs *inputs)
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{
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const struct panfrost_device *dev = pool->dev;
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struct panfrost_ptr push_consts_buf =
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pan_pool_alloc_aligned(pool,
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ALIGN(dev->indirect_dispatch.push.count * 4, 16),
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16);
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uint32_t *out = push_consts_buf.cpu;
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uint8_t *in = (uint8_t *)inputs;
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for (unsigned i = 0; i < dev->indirect_dispatch.push.count; ++i)
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memcpy(out + i, in + dev->indirect_dispatch.push.words[i].offset, 4);
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return push_consts_buf.gpu;
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}
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unsigned
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GENX(pan_indirect_dispatch_emit)(struct pan_pool *pool,
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struct pan_scoreboard *scoreboard,
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const struct pan_indirect_dispatch_info *dispatch_info)
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{
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struct panfrost_device *dev = pool->dev;
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struct panfrost_ptr job =
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pan_pool_alloc_desc(pool, COMPUTE_JOB);
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void *invocation =
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pan_section_ptr(job.cpu, COMPUTE_JOB, INVOCATION);
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struct indirect_dispatch_inputs inputs = {
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.job = dispatch_info->job,
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.indirect_dim = dispatch_info->indirect_dim,
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.num_wg_sysval = {
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dispatch_info->num_wg_sysval[0],
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dispatch_info->num_wg_sysval[1],
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dispatch_info->num_wg_sysval[2],
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},
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};
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panfrost_pack_work_groups_compute(invocation,
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1, 1, 1, 1, 1, 1,
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false, false);
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pan_section_pack(job.cpu, COMPUTE_JOB, PARAMETERS, cfg) {
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cfg.job_task_split = 2;
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}
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pan_section_pack(job.cpu, COMPUTE_JOB, DRAW, cfg) {
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cfg.draw_descriptor_is_64b = true;
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cfg.state = get_rsd(dev);
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cfg.thread_storage = get_tls(pool->dev);
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cfg.uniform_buffers = get_ubos(pool, &inputs);
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cfg.push_uniforms = get_push_uniforms(pool, &inputs);
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}
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return panfrost_add_job(pool, scoreboard, MALI_JOB_TYPE_COMPUTE,
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false, true, 0, 0, &job, false);
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}
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void
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GENX(pan_indirect_dispatch_init)(struct panfrost_device *dev)
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{
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE,
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GENX(pan_shader_get_compiler_options)(),
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"%s", "indirect_dispatch");
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b.shader->info.internal = true;
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nir_variable_create(b.shader, nir_var_mem_ubo,
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glsl_uint_type(), "inputs");
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b.shader->info.num_ubos++;
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nir_ssa_def *zero = nir_imm_int(&b, 0);
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nir_ssa_def *one = nir_imm_int(&b, 1);
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nir_ssa_def *num_wg = nir_load_global(&b, get_input_field(&b, indirect_dim), 4, 3, 32);
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nir_ssa_def *num_wg_x = nir_channel(&b, num_wg, 0);
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nir_ssa_def *num_wg_y = nir_channel(&b, num_wg, 1);
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nir_ssa_def *num_wg_z = nir_channel(&b, num_wg, 2);
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nir_ssa_def *job_hdr_ptr = get_input_field(&b, job);
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nir_ssa_def *num_wg_flat = nir_imul(&b, num_wg_x, nir_imul(&b, num_wg_y, num_wg_z));
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nir_push_if(&b, nir_ieq(&b, num_wg_flat, zero));
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{
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nir_ssa_def *type_ptr = nir_iadd(&b, job_hdr_ptr, nir_imm_int64(&b, 4 * 4));
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nir_ssa_def *ntype = nir_imm_intN_t(&b, (MALI_JOB_TYPE_NULL << 1) | 1, 8);
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nir_store_global(&b, type_ptr, 1, ntype, 1);
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}
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nir_push_else(&b, NULL);
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{
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nir_ssa_def *job_dim_ptr = nir_iadd(&b, job_hdr_ptr,
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nir_imm_int64(&b, pan_section_offset(COMPUTE_JOB, INVOCATION)));
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nir_ssa_def *num_wg_x_m1 = nir_isub(&b, num_wg_x, one);
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nir_ssa_def *num_wg_y_m1 = nir_isub(&b, num_wg_y, one);
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nir_ssa_def *num_wg_z_m1 = nir_isub(&b, num_wg_z, one);
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nir_ssa_def *job_dim = nir_load_global(&b, job_dim_ptr, 8, 2, 32);
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nir_ssa_def *dims = nir_channel(&b, job_dim, 0);
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nir_ssa_def *split = nir_channel(&b, job_dim, 1);
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nir_ssa_def *num_wg_x_split = nir_iand_imm(&b, nir_ushr_imm(&b, split, 10), 0x3f);
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nir_ssa_def *num_wg_y_split = nir_iadd(&b, num_wg_x_split,
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nir_isub_imm(&b, 32, nir_uclz(&b, num_wg_x_m1)));
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nir_ssa_def *num_wg_z_split = nir_iadd(&b, num_wg_y_split,
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nir_isub_imm(&b, 32, nir_uclz(&b, num_wg_y_m1)));
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split = nir_ior(&b, split,
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nir_ior(&b,
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nir_ishl(&b, num_wg_y_split, nir_imm_int(&b, 16)),
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nir_ishl(&b, num_wg_z_split, nir_imm_int(&b, 22))));
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dims = nir_ior(&b, dims,
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nir_ior(&b, nir_ishl(&b, num_wg_x_m1, num_wg_x_split),
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nir_ior(&b, nir_ishl(&b, num_wg_y_m1, num_wg_y_split),
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nir_ishl(&b, num_wg_z_m1, num_wg_z_split))));
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nir_store_global(&b, job_dim_ptr, 8, nir_vec2(&b, dims, split), 3);
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nir_ssa_def *num_wg_x_ptr = get_input_field(&b, num_wg_sysval[0]);
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nir_push_if(&b, nir_ine(&b, num_wg_x_ptr, nir_imm_int64(&b, 0)));
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{
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nir_store_global(&b, num_wg_x_ptr, 8, num_wg_x, 1);
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nir_store_global(&b, get_input_field(&b, num_wg_sysval[1]), 8, num_wg_y, 1);
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nir_store_global(&b, get_input_field(&b, num_wg_sysval[2]), 8, num_wg_z, 1);
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}
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nir_pop_if(&b, NULL);
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}
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nir_pop_if(&b, NULL);
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struct panfrost_compile_inputs inputs = { .gpu_id = dev->gpu_id };
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struct pan_shader_info shader_info;
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struct util_dynarray binary;
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util_dynarray_init(&binary, NULL);
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GENX(pan_shader_compile)(b.shader, &inputs, &binary, &shader_info);
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ralloc_free(b.shader);
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assert(!shader_info.tls_size);
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assert(!shader_info.wls_size);
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assert(!shader_info.sysvals.sysval_count);
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dev->indirect_dispatch.bin =
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panfrost_bo_create(dev, binary.size, PAN_BO_EXECUTE,
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"Indirect dispatch shader");
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memcpy(dev->indirect_dispatch.bin->ptr.cpu, binary.data, binary.size);
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util_dynarray_fini(&binary);
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dev->indirect_dispatch.push = shader_info.push;
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dev->indirect_dispatch.descs =
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panfrost_bo_create(dev,
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pan_size(RENDERER_STATE) +
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pan_size(LOCAL_STORAGE),
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0, "Indirect dispatch descriptors");
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mali_ptr address = dev->indirect_dispatch.bin->ptr.gpu;
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#if PAN_ARCH <= 5
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address |= shader_info.midgard.first_tag;
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#endif
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void *rsd = dev->indirect_dispatch.descs->ptr.cpu;
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pan_pack(rsd, RENDERER_STATE, cfg) {
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pan_shader_prepare_rsd(&shader_info, address, &cfg);
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}
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void *tsd = dev->indirect_dispatch.descs->ptr.cpu +
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pan_size(RENDERER_STATE);
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pan_pack(tsd, LOCAL_STORAGE, ls) {
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ls.wls_instances = MALI_LOCAL_STORAGE_NO_WORKGROUP_MEM;
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};
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}
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void
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GENX(pan_indirect_dispatch_cleanup)(struct panfrost_device *dev)
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{
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panfrost_bo_unreference(dev->indirect_dispatch.bin);
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panfrost_bo_unreference(dev->indirect_dispatch.descs);
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}
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