Connor Abbott 736570b74d ir3: Add support for ldc.u ... This will be important for using shared registers as much as possible. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22075>		2024-04-26 12:55:13 +00:00
..
encode.c	isaspec: encode: Constify encode.type	2024-03-05 07:29:08 +00:00
ir3-cat0.xml	ir3: model predt/predf without sources	2024-04-23 19:18:29 +00:00
ir3-cat1.xml	ir3/a7xx: Add definitions for (last) src GPR attribute	2023-04-27 21:06:47 +00:00
ir3-cat2.xml	ir3: Add support for (dis)assembling flat.b	2021-11-04 02:59:28 +00:00
ir3-cat3.xml	ir3/a7xx: Add definitions for (last) src GPR attribute	2023-04-27 21:06:47 +00:00
ir3-cat4.xml	freedreno/isa: Convert to srcs/dsts	2021-06-23 17:20:29 +00:00
ir3-cat5.xml	ir3/a7xx: cat5 mode1 has swapped tex/samp ids	2023-09-05 16:19:29 +00:00
ir3-cat6.xml	ir3: Add support for ldc.u	2024-04-26 12:55:13 +00:00
ir3-cat7.xml	ir3/a7xx: Add ccinv instruction	2023-09-05 16:19:30 +00:00
ir3-common.xml	ir3: Fix values of #wrmask not being compatible with ir3 parser	2023-10-11 18:35:32 +00:00
ir3-disasm.c	ir3-disasm: add option to disassemble hex number	2024-04-04 19:37:25 +00:00
ir3.xml	freedreno/isa: Convert to srcs/dsts	2021-06-23 17:20:29 +00:00
isa.h	isaspec: Move isa_decode(..) declaration	2022-09-03 19:26:04 +00:00
meson.build	ir3-disasm: add options to specify GPU by chip ID or name	2024-04-04 19:37:25 +00:00