mesa/src/intel
Kenneth Graunke b637f6c3db intel/decoder: Fix binding table pointer decoding with large offsets
XeHP supports a 20:5 pointer format, so the offset can legitimately
be more than UINT16_MAX.  Likewise, with 256B binding table mode on
Icelake/Tigerlake, we might have 18:8 pointers that exceed UINT16_MAX.

Thanks to Felix DeGrood for catching this!

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16538>
2022-05-17 08:52:00 +00:00
..
blorp nir/builder: Add a nir_trim_vector helper 2022-05-11 14:47:33 +00:00
ci ci/iris: skqp: remove flaking atlastext for TGL 2022-05-17 06:57:19 +00:00
common intel/decoder: Fix binding table pointer decoding with large offsets 2022-05-17 08:52:00 +00:00
compiler gallium/drivers: set force_indirect_unrolling_sampler for all required drivers 2022-05-17 02:12:21 +00:00
dev intel/dev: Enable first set of DG2 PCI IDs 2022-05-12 03:03:57 -07:00
ds intel/ds: fix compilation with perfetto 2022-02-08 12:29:21 +00:00
genxml intel/genxml: Add SAMPLER_MODE bits for enabling Small PL on Icelake 2022-04-11 19:17:07 +00:00
isl isl,iris: Add DG2 CCS modifier support for XeHP 2022-04-28 20:02:14 +00:00
nullhw-layer vulkan: drop empty vulkan_wsi_args 2022-04-27 11:51:26 +00:00
perf intel/perf: Fix OA report accumulation on Gfx12+. 2022-04-12 00:11:47 +00:00
tools drm-shim: Better mmap offsets 2022-05-02 19:50:33 +00:00
vulkan anv: fix primitives generated queries values 2022-05-14 10:47:29 +00:00
Makefile.perf.am intel: Rename GEN_PERF prefix to INTEL_PERF in build files 2021-04-20 20:06:34 +00:00
meson.build anv: add perfetto source 2022-01-14 20:17:44 +00:00