Ruijing Dong 80d3e84b81 radeonsi/vcn: add cdef modes for vcn5 encoding ... default mode is the cdef id is managed by FW. explicit mode is using external cdef id. Acked-by: Leo Liu <leo.liu@amd.com> Signed-off-by: Ruijing Dong <ruijing.dong@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>		2024-05-30 20:12:37 +00:00
..
addrlib	amd: add more gfx11 APUs	2024-05-24 13:48:28 +00:00
ci	radv/ci: add a bunch of flakes	2024-05-24 21:05:46 +00:00
common	radeonsi/vcn: add cdef modes for vcn5 encoding	2024-05-30 20:12:37 +00:00
compiler	build/amd: add amd-use-llvm build option	2024-05-30 19:05:00 +00:00
drm-shim	amd: Use align64 instead of ALIGN for 64 bit value parameter	2024-01-03 22:02:17 +00:00
llvm	ac/llvm: fix incorrect parameter type in llvm.amdgcn.s.nop	2024-05-24 13:48:28 +00:00
registers	amd: add gfx12 register definitions	2024-05-11 22:14:05 -04:00
vpelib	amd/vpelib: Bypass de/regam on HLG	2024-05-07 20:43:02 +00:00
vulkan	build/amd: add amd-use-llvm build option	2024-05-30 19:05:00 +00:00
meson.build	build/amd: add amd-use-llvm build option	2024-05-30 19:05:00 +00:00