mesa/src/etnaviv
Christian Gmeiner 68fb3a601c
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etnaviv: isa: Add assembler support for infinity and NaN immediates
Implement parsing and encoding of special floating-point values for
both 20-bit (f20) and 16-bit (f16) immediate formats:

  inf:f20   - Positive infinity (imm_val=0x7f800, imm_type=0)
  -inf:f20  - Negative infinity (imm_val=0xff800, imm_type=0)
  nan:f20   - Quiet NaN         (imm_val=0x7fc00, imm_type=0)
  -nan:f20  - Negative NaN      (imm_val=0xffc00, imm_type=0)

  inf:f16   - Positive infinity (imm_val=0x7c00, imm_type=3)
  -inf:f16  - Negative infinity (imm_val=0xfc00, imm_type=3)
  nan:f16   - Quiet NaN         (imm_val=0x7fff, imm_type=3)
  -nan:f16  - Negative NaN      (imm_val=0xffff, imm_type=3)

The f20 format stores the upper 20 bits of an IEEE 754 single-precision
float. The f16 format stores the 16-bit half-float value directly.

This enables round-trip assembly of shaders containing these special
values, which can appear in GPU command streams captured from the
proprietary driver.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: @LingMan
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39016>
2025-12-25 22:57:48 +00:00
..
ci Uprev Piglit to 2842979ebe03b99c33c3e49af5960c69be6c6d46 2025-12-12 21:45:24 +00:00
common etnaviv: Turn ETNA_CORE_ into ETNA_FEATURE_CORE_ 2025-09-30 20:45:17 +00:00
drm treewide: Replace calling to function ALIGN with align 2025-11-12 21:58:40 +00:00
drm-shim build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
hw etnaviv: Update headers from rnndb 2025-09-26 10:30:16 +00:00
hwdb etnaviv: Turn ETNA_CORE_ into ETNA_FEATURE_CORE_ 2025-09-30 20:45:17 +00:00
isa etnaviv: isa: Add assembler support for infinity and NaN immediates 2025-12-25 22:57:48 +00:00
meson.build build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00