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7ea12d6ace
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28551>
133 lines
4.4 KiB
C
133 lines
4.4 KiB
C
/*
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* Copyright © 2016 Red Hat.
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* Copyright © 2016 Bas Nieuwenhuizen
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*
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* based in part on anv driver which is:
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef RADV_QUEUE_H
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#define RADV_QUEUE_H
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#include "vk_queue.h"
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#include "radv_radeon_winsys.h"
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struct radv_device;
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struct radv_queue_ring_info {
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uint32_t scratch_size_per_wave;
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uint32_t scratch_waves;
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uint32_t compute_scratch_size_per_wave;
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uint32_t compute_scratch_waves;
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uint32_t esgs_ring_size;
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uint32_t gsvs_ring_size;
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uint32_t attr_ring_size;
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bool tess_rings;
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bool task_rings;
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bool mesh_scratch_ring;
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bool gds;
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bool gds_oa;
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bool sample_positions;
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};
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enum radv_queue_family {
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RADV_QUEUE_GENERAL,
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RADV_QUEUE_COMPUTE,
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RADV_QUEUE_TRANSFER,
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RADV_QUEUE_SPARSE,
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RADV_QUEUE_VIDEO_DEC,
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RADV_QUEUE_VIDEO_ENC,
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RADV_MAX_QUEUE_FAMILIES,
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RADV_QUEUE_FOREIGN = RADV_MAX_QUEUE_FAMILIES,
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RADV_QUEUE_IGNORED,
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};
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struct radv_queue_state {
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enum radv_queue_family qf;
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struct radv_queue_ring_info ring_info;
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struct radeon_winsys_bo *scratch_bo;
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struct radeon_winsys_bo *descriptor_bo;
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struct radeon_winsys_bo *compute_scratch_bo;
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struct radeon_winsys_bo *esgs_ring_bo;
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struct radeon_winsys_bo *gsvs_ring_bo;
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struct radeon_winsys_bo *tess_rings_bo;
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struct radeon_winsys_bo *task_rings_bo;
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struct radeon_winsys_bo *mesh_scratch_ring_bo;
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struct radeon_winsys_bo *attr_ring_bo;
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struct radeon_winsys_bo *gds_bo;
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struct radeon_winsys_bo *gds_oa_bo;
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struct radeon_cmdbuf *initial_preamble_cs;
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struct radeon_cmdbuf *initial_full_flush_preamble_cs;
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struct radeon_cmdbuf *continue_preamble_cs;
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struct radeon_cmdbuf *gang_wait_preamble_cs;
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struct radeon_cmdbuf *gang_wait_postamble_cs;
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/* the uses_shadow_regs here will be set only for general queue */
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bool uses_shadow_regs;
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/* register state is saved in shadowed_regs buffer */
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struct radeon_winsys_bo *shadowed_regs;
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/* shadow regs preamble ib. This will be the first preamble ib.
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* This ib has the packets to start register shadowing.
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*/
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struct radeon_winsys_bo *shadow_regs_ib;
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uint32_t shadow_regs_ib_size_dw;
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};
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struct radv_queue {
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struct vk_queue vk;
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struct radv_device *device;
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struct radeon_winsys_ctx *hw_ctx;
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enum radeon_ctx_priority priority;
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struct radv_queue_state state;
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struct radv_queue_state *follower_state;
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struct radeon_winsys_bo *gang_sem_bo;
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uint64_t last_shader_upload_seq;
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bool sqtt_present;
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};
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VK_DEFINE_HANDLE_CASTS(radv_queue, vk.base, VkQueue, VK_OBJECT_TYPE_QUEUE)
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static inline struct radv_device *
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radv_queue_device(const struct radv_queue *queue)
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{
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return (struct radv_device *)queue->vk.base.device;
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}
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int radv_queue_init(struct radv_device *device, struct radv_queue *queue, int idx,
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const VkDeviceQueueCreateInfo *create_info,
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const VkDeviceQueueGlobalPriorityCreateInfoKHR *global_priority);
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void radv_queue_finish(struct radv_queue *queue);
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enum radeon_ctx_priority radv_get_queue_global_priority(const VkDeviceQueueGlobalPriorityCreateInfoKHR *pObj);
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void radv_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs);
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bool radv_queue_internal_submit(struct radv_queue *queue, struct radeon_cmdbuf *cs);
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enum amd_ip_type radv_queue_ring(const struct radv_queue *queue);
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#endif /* RADV_QUEUE_H */
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