mesa/src/amd
Daniel Schürmann 7e1faf9349 aco: make clause-forming depend on the number of moved instructions
This allows more aggressive clause-forming in presence of
larger def-use distances. To compensate for the effect,
VMEM_CLAUSE_MAX_GRAB_DIST was decreased.

Totals from 5788 (3.85% of 150170) affected shaders: (GFX10.3)
VGPRs: 483960 -> 475272 (-1.80%); split: -1.82%, +0.02%
CodeSize: 59661240 -> 59669084 (+0.01%); split: -0.01%, +0.02%
MaxWaves: 70408 -> 71450 (+1.48%); split: +1.51%, -0.03%
Instrs: 11222417 -> 11224479 (+0.02%); split: -0.01%, +0.03%
Latency: 349397104 -> 349298602 (-0.03%); split: -0.03%, +0.00%
InvThroughput: 88584832 -> 87762262 (-0.93%); split: -0.93%, +0.00%
VClause: 168905 -> 177089 (+4.85%); split: -0.48%, +5.32%
SClause: 375795 -> 375767 (-0.01%); split: -0.01%, +0.01%
Copies: 840298 -> 840231 (-0.01%); split: -0.04%, +0.03%
Branches: 373265 -> 373278 (+0.00%); split: -0.00%, +0.00%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10896>
2021-09-27 14:29:16 +00:00
..
addrlib amd/addrlib: expose CMASK address equations to drivers on GFX10+ 2021-08-05 06:37:09 +00:00
ci aco/nops: fix handle_raw_hazard_internal when visiting the current block 2021-09-17 16:43:00 +00:00
common ac/surface: correct a comment about DCC image stores 2021-09-25 08:49:05 +00:00
compiler aco: make clause-forming depend on the number of moved instructions 2021-09-27 14:29:16 +00:00
llvm radv: Support nir_intrinsic_load_global_constant. 2021-09-21 01:53:39 +00:00
registers python: drop python2 support 2021-08-14 21:44:32 +00:00
vulkan radv: pass the pipeline key to the backend compilers 2021-09-27 11:57:25 +02:00
.clang-format radv: Add clang-format for AMD code. 2021-04-10 03:31:32 +02:00
meson.build aco: add framework for unit testing 2020-07-30 16:13:08 +00:00