Tapani Pälli 7a6ea04795 anv: invalidate L3 read only cache when VF cache is invalidated ... When enabling the caching of index,vertex data in the L3 RO Cache (L3BypassDisable), we need to use L3ReadOnlyCacheInvalidationEnable to invalidate cache when buffer is modified by CPU/GPU. Ref: bspec 46314 Fixes: 6c345ddbe4 ("anv: Cache VB/IB in L3$ for Gfx12") Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5941 Signed-off-by: Tapani Pälli <tapani.palli@intel.com> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14815>		2022-02-09 10:05:10 +00:00
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blorp	blorp: Assert that blorp_copy() on the blitter can handle it	2022-02-07 09:50:01 -08:00
ci	ci: Bump VK-GL-CTS to 1.3.1.0.	2022-02-08 22:16:36 +00:00
common	intel: Add missing dep of gen_*_header.py on utils.py.	2022-02-02 11:21:57 -08:00
compiler	anv: Refactor descriptor copy	2022-02-09 09:24:37 +00:00
dev	anv: enable ray queries	2022-02-08 12:55:25 +00:00
ds	intel/ds: fix compilation with perfetto	2022-02-08 12:29:21 +00:00
genxml	intel/genxml: add PIPE_CONTROL field for L3 read only cache invalidation	2022-02-09 10:05:10 +00:00
isl	isl: disable CPB surface compression	2022-02-02 17:09:46 +00:00
nullhw-layer	intel/nullhw: fix build	2021-03-26 20:12:40 +00:00
perf	intel/perf: use a function to do common allocations	2022-01-20 06:41:17 +00:00
tools	intel: remove chipset_id	2022-01-13 03:09:36 +00:00
vulkan	anv: invalidate L3 read only cache when VF cache is invalidated	2022-02-09 10:05:10 +00:00
Makefile.perf.am	intel: Rename GEN_PERF prefix to INTEL_PERF in build files	2021-04-20 20:06:34 +00:00
meson.build	anv: add perfetto source	2022-01-14 20:17:44 +00:00