mesa/src/intel
Lionel Landwerlin 10e75aae1b intel/nir: rerun lower_tex if it lowers something
nir_lower_tex can lower tg4 coords into tg4 offset which on DG2+ we
also need to lower into constant offsets.

Unfortunately the nir_lower_tex pass is not able to lower the
instructions it itself generates, so the easy fix for when
nir_lower_tex lowers tg4 coords into tg4 offsets is to rerun the pass.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9735
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25015>
2023-09-05 13:35:51 +00:00
..
blorp blorp: drop undefined macro 2023-09-03 03:04:26 +00:00
ci ci: Disable WHL jobs 2023-09-02 15:43:01 -04:00
common intel/measure: track batch buffer sizes 2023-09-05 11:50:02 +00:00
compiler intel/nir: rerun lower_tex if it lowers something 2023-09-05 13:35:51 +00:00
dev intel: Add env variable to add break point on/before draw 2023-08-08 17:36:19 +00:00
ds intel/compiler,intel/blorp,intel/vulkan: decouple vulkan driver and compiler from gallium 2023-08-03 22:00:15 +00:00
genxml genxml/gfx12: rename Tiled Resource Mode 2023-09-01 23:22:17 +00:00
isl isl/tilememcpy_test: add multiple tile testing 2023-09-02 21:49:05 -07:00
nullhw-layer vulkan/layers: Use PUBLIC instead of VK_LAYER_EXPORT 2023-02-17 03:42:34 +00:00
perf intel: Move i915_drm.h specific code from common/intel_gem.h to common/i915/intel_gem.h 2023-07-28 15:36:52 +00:00
tools intel/compiler,intel/blorp,intel/vulkan: decouple vulkan driver and compiler from gallium 2023-08-03 22:00:15 +00:00
vulkan intel/measure: track batch buffer sizes 2023-09-05 11:50:02 +00:00
vulkan_hasvk treewide: Use nir_before/after_impl for more elaborate cases 2023-08-30 19:30:58 +00:00
meson.build intel: Only build perf if drivers or tools are enabled 2023-08-31 21:53:19 +00:00