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https://gitlab.freedesktop.org/mesa/mesa.git
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f229e9cb51
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36793>
76 lines
2.6 KiB
C
76 lines
2.6 KiB
C
/*
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* Copyright © 2024 Valve Corporation
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef RADV_DGC_H
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#define RADV_DGC_H
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#include "compiler/shader_enums.h"
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#include "radv_constants.h"
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#include "vk_device_generated_commands.h"
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struct radv_cmd_buffer;
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struct radv_device;
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enum radv_queue_family;
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struct radv_indirect_command_layout {
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struct vk_indirect_command_layout vk;
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uint64_t push_constant_mask;
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uint32_t push_constant_offsets[MAX_PUSH_CONSTANTS_SIZE / 4];
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uint64_t sequence_index_mask;
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VkPipelineLayout pipeline_layout;
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VkPipeline pipeline;
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};
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VK_DEFINE_NONDISP_HANDLE_CASTS(radv_indirect_command_layout, vk.base, VkIndirectCommandsLayoutEXT,
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VK_OBJECT_TYPE_INDIRECT_COMMANDS_LAYOUT_EXT)
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struct radv_indirect_execution_set {
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struct vk_object_base base;
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struct radeon_winsys_bo *bo;
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uint64_t va;
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uint8_t *mapped_ptr;
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uint32_t stride;
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uint32_t cs_num_dw;
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bool uses_grid_base_sgpr;
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bool uses_upload_sgpr;
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bool uses_indirect_desc_sets_sgpr;
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uint16_t push_constant_size;
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uint32_t compute_scratch_size_per_wave;
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uint32_t compute_scratch_waves;
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};
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VK_DEFINE_NONDISP_HANDLE_CASTS(radv_indirect_execution_set, base, VkIndirectExecutionSetEXT,
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VK_OBJECT_TYPE_INDIRECT_EXECUTION_SET_EXT);
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uint32_t radv_dgc_get_buffer_alignment(const struct radv_device *device);
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uint32_t radv_get_indirect_main_cmdbuf_offset(const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo);
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uint32_t radv_get_indirect_ace_cmdbuf_offset(const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo);
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uint32_t radv_get_indirect_main_cmdbuf_size(const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo);
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uint32_t radv_get_indirect_ace_cmdbuf_size(const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo);
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uint32_t radv_get_indirect_main_trailer_offset(const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo);
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uint32_t radv_get_indirect_ace_trailer_offset(const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo);
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void radv_prepare_dgc(struct radv_cmd_buffer *cmd_buffer, const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo,
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struct radv_cmd_buffer *state_cmd_buffer, bool cond_render_enabled);
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bool radv_use_dgc_predication(struct radv_cmd_buffer *cmd_buffer,
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const VkGeneratedCommandsInfoEXT *pGeneratedCommandsInfo);
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struct radv_shader *radv_dgc_get_shader(const VkGeneratedCommandsPipelineInfoEXT *pipeline_info,
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const VkGeneratedCommandsShaderInfoEXT *eso_info, mesa_shader_stage stage);
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#endif /* RADV_DGC_H */
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