Bas Nieuwenhuizen 75ae391375 radv: Reduce descriptor pool allocation for alignment. ... Since we can now rely on this due to the stricter layout code. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20847>		2023-01-25 08:45:50 +00:00
..
addrlib	meson: Enable initialized-but-unused warning for MSVC	2022-11-17 21:20:38 +00:00
ci	ci/piglit: Add some common piglit skips for Mesa CI's testing of glx.	2023-01-24 00:13:02 +00:00
common	ac,radeonsi: move shadow regs create ib preamble function to amd common	2023-01-25 04:53:34 +00:00
compiler	Revert "aco: Combine v_cvt_u32_f32 with insert to v_cvt_pk_u8_f32."	2023-01-23 16:22:55 +00:00
drm-shim	r300: use drm_shim_override	2022-11-16 14:37:47 +00:00
llvm	ac/llvm: add support for fp32 addition atomics	2023-01-17 17:39:15 +00:00
registers	amd/registers: regenerate gfx11 headers from amd-staging-drm-next	2022-11-04 00:42:08 +00:00
vulkan	radv: Reduce descriptor pool allocation for alignment.	2023-01-25 08:45:50 +00:00
.clang-format	radv: Add nir_foreach_variable_with_modes to .clang-format	2022-12-09 07:07:10 +00:00
meson.build	meson: build radeon drm-shim also for r300 and r600	2022-11-16 14:37:47 +00:00