mesa/src/amd
Samuel Pitoiset 74e625f057 radv: enable SQTT instruction timing by default
It seems stable enough to turn it on by default. This replaces
RADV_THREAD_TRACE_PIPELINE by RADV_THREAD_TRACE_INSTRUCTION_TIMING
which is enabled by default.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13477>
2021-11-01 17:32:50 +00:00
..
addrlib amd/addrlib: cosmetic addrlib update 2021-10-21 16:26:06 +00:00
ci ci/deqp-runner: Rename the deqp-drivername-*.txt files to drivername-*.txt 2021-10-27 20:54:11 +00:00
common ac/nir: remove bogus assertion about the position for culling 2021-10-28 10:44:20 +00:00
compiler aco: use std::vector and IDSet in RA validator 2021-10-28 08:55:35 +00:00
llvm ac/llvm: accept primitives whose face culling determinant is Inf or NaN 2021-10-19 12:49:06 +00:00
registers python: drop python2 support 2021-08-14 21:44:32 +00:00
vulkan radv: enable SQTT instruction timing by default 2021-11-01 17:32:50 +00:00
.clang-format radv: Add clang-format for AMD code. 2021-04-10 03:31:32 +02:00
meson.build radv: Allow building when LLVM isn’t enabled 2021-10-01 10:40:18 +02:00