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f603d8ce9e
See 0afd691f29 ("panfrost: clang-format the tree") for why I'm doing this.
Asahi already mostly follows Mesa style so this doesn't do much. But this means
we can all stop thinking about formatting and trust the robot poets to do that
for us.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
110 lines
3.1 KiB
C
110 lines
3.1 KiB
C
/*
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* Copyright 2022 Alyssa Rosenzweig
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* SPDX-License-Identifier: MIT
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*/
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#include "agx_tilebuffer.h"
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#include <assert.h>
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#include "util/format/u_format.h"
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#include "agx_formats.h"
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#include "agx_usc.h"
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/* Maximum number of bytes per tile on G13G. This may change in future versions
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* of the architecture.
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*/
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#define MAX_BYTES_PER_TILE (32768 - 1)
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/* Select the largest tile size that fits */
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static struct agx_tile_size
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agx_select_tile_size(unsigned bytes_per_pixel)
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{
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/* clang-format off */
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struct agx_tile_size sizes[] = {
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{ 32, 32 },
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{ 32, 16 },
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{ 16, 16 }
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};
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/* clang-format on */
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for (unsigned i = 0; i < ARRAY_SIZE(sizes); ++i) {
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struct agx_tile_size size = sizes[i];
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if ((bytes_per_pixel * size.width * size.height) <= MAX_BYTES_PER_TILE)
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return size;
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}
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unreachable("No supported tile size meets the bytes per pixel requirement");
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}
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struct agx_tilebuffer_layout
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agx_build_tilebuffer_layout(enum pipe_format *formats, uint8_t nr_cbufs,
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uint8_t nr_samples)
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{
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struct agx_tilebuffer_layout tib = {.nr_samples = nr_samples};
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uint32_t offset_B = 0;
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for (unsigned rt = 0; rt < nr_cbufs; ++rt) {
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tib.logical_format[rt] = formats[rt];
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/* Require natural alignment for tilebuffer allocations. This could be
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* optimized, but this shouldn't be a problem in practice.
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*/
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enum pipe_format physical_fmt = agx_tilebuffer_physical_format(&tib, rt);
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unsigned align_B = util_format_get_blocksize(physical_fmt);
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offset_B = ALIGN_POT(offset_B, align_B);
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tib.offset_B[rt] = offset_B;
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unsigned nr = util_format_get_nr_components(physical_fmt) == 1
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? util_format_get_nr_components(formats[rt])
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: 1;
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unsigned size_B = align_B * nr;
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offset_B += size_B;
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}
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assert(offset_B <= 128 && "should fit in uint8");
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tib.sample_size_B = ALIGN_POT(offset_B, 8);
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tib.tile_size = agx_select_tile_size(tib.sample_size_B * nr_samples);
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return tib;
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}
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enum pipe_format
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agx_tilebuffer_physical_format(struct agx_tilebuffer_layout *tib, unsigned rt)
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{
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return agx_pixel_format[tib->logical_format[rt]].internal;
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}
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static unsigned
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agx_shared_layout_from_tile_size(struct agx_tile_size t)
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{
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if (t.width == 32 && t.height == 32)
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return AGX_SHARED_LAYOUT_32X32;
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else if (t.width == 32 && t.height == 16)
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return AGX_SHARED_LAYOUT_32X16;
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else if (t.width == 16 && t.height == 16)
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return AGX_SHARED_LAYOUT_16X16;
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else
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unreachable("Invalid tile size");
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}
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uint32_t
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agx_tilebuffer_total_size(struct agx_tilebuffer_layout *tib)
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{
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return tib->sample_size_B * tib->nr_samples * tib->tile_size.width *
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tib->tile_size.height;
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}
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void
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agx_usc_tilebuffer(struct agx_usc_builder *b, struct agx_tilebuffer_layout *tib)
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{
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agx_usc_pack(b, SHARED, cfg) {
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cfg.uses_shared_memory = true;
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cfg.layout = agx_shared_layout_from_tile_size(tib->tile_size);
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cfg.sample_stride_in_8_bytes = tib->sample_size_B / 8;
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cfg.sample_count = tib->nr_samples;
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cfg.bytes_per_threadgroup = agx_tilebuffer_total_size(tib);
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}
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}
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