Daniel Schürmann 70aea6b41a aco/ra: refactor collect_vars() to return a sorted vector ... The vector of IDs is sorted with decreasing sizes, and by increasing assigned registers. This decouples register assingment from ssa IDs. Totals from 12694 (9.41% of 134913) affected shaders: (GFX10.3) VGPRs: 757864 -> 757848 (-0.00%); split: -0.00%, +0.00% CodeSize: 72350540 -> 72348688 (-0.00%); split: -0.02%, +0.02% MaxWaves: 237018 -> 237020 (+0.00%); split: +0.00%, -0.00% Instrs: 13545494 -> 13544699 (-0.01%); split: -0.03%, +0.02% Latency: 148539203 -> 148533292 (-0.00%); split: -0.01%, +0.00% InvThroughput: 30319086 -> 30320382 (+0.00%); split: -0.01%, +0.01% VClause: 326875 -> 327028 (+0.05%); split: -0.05%, +0.09% SClause: 479833 -> 479837 (+0.00%); split: -0.00%, +0.00% Copies: 862152 -> 860914 (-0.14%); split: -0.43%, +0.28% Branches: 317775 -> 317777 (+0.00%) Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11526>		2022-03-14 08:32:10 +00:00
..
addrlib	amd: update addrlib	2022-03-01 17:03:00 +00:00
ci	radv/ci: remove unused files	2022-03-08 08:25:34 +01:00
common	ac: Query the amdgpu MEC firmware version.	2022-03-09 21:31:48 +00:00
compiler	aco/ra: refactor collect_vars() to return a sorted vector	2022-03-14 08:32:10 +00:00
drm-shim	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00
llvm	ac/nir: implement nir_op_pack_{uint,sint}_2x16	2022-03-04 08:06:56 +00:00
registers	amd: remove the _UMD suffix from register definitions	2022-02-22 11:41:04 +00:00
vulkan	radv: rework the CS regalloc hang workaround	2022-03-14 08:05:32 +01:00
.clang-format	radv, aco: Add u_foreach_bit to .clang-format.	2022-02-22 14:57:29 +00:00
meson.build	r300/r600: Add drm-shim support.	2022-02-02 00:59:08 +00:00