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For geometry shaders, we're going to need to compile various graphics shaders down to compute shaders. This means that they'll look like compute shaders to much of the compile pipeline but ultimately get executed as graphics shaders. Most of the time, the compiler will just happily take whatever offset you give and try to load the sysval from there so you can load a graphics sysval from a compute shader just fine. However, for the common ones, we switch on the shader stage and load from a different offset for 3D vs. compute. This breaks the moment you have a compute shader that's going to actually load from a 3D sysval space. The solution here is to ensure that any common sysvals (currently just the push uniforms address and the printf buffer) are at exactly the same offset in both. This is done by adding a panvk_common_sysvals struct, some static asserts, and a bit of macro magic to keep things eurgonamic. This also changes push uniform upload to just swap in the push uniform address instead of writing it to the command buffer on every iteration. Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38508>
71 lines
2.6 KiB
C
71 lines
2.6 KiB
C
/*
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* Copyright © 2024 Collabora Ltd.
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* Copyright © 2024 Arm Ltd.
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*
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* SPDX-License-Identifier: MIT
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*/
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#include "panvk_cmd_buffer.h"
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#include "panvk_cmd_dispatch.h"
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void
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panvk_per_arch(cmd_prepare_dispatch_sysvals)(
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struct panvk_cmd_buffer *cmdbuf, const struct panvk_dispatch_info *info)
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{
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const struct panvk_shader_variant *cs =
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panvk_shader_only_variant(cmdbuf->state.compute.shader);
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BITSET_DECLARE(dirty_sysvals, MAX_SYSVAL_FAUS) = {0};
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/* In indirect case, some sysvals are read from the indirect dispatch
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* buffer.
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*/
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if (info->indirect.buffer_dev_addr == 0) {
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set_compute_sysval(cmdbuf, dirty_sysvals, num_work_groups.x,
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info->direct.wg_count.x);
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set_compute_sysval(cmdbuf, dirty_sysvals, num_work_groups.y,
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info->direct.wg_count.y);
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set_compute_sysval(cmdbuf, dirty_sysvals, num_work_groups.z,
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info->direct.wg_count.z);
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} else {
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BITSET_SET_RANGE(dirty_sysvals,
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sysval_fau_start(compute, num_work_groups),
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sysval_fau_end(compute, num_work_groups));
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}
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set_compute_sysval(cmdbuf, dirty_sysvals, base.x, info->wg_base.x);
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set_compute_sysval(cmdbuf, dirty_sysvals, base.y, info->wg_base.y);
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set_compute_sysval(cmdbuf, dirty_sysvals, base.z, info->wg_base.z);
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set_compute_sysval(cmdbuf, dirty_sysvals, local_group_size.x,
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cs->cs.local_size.x);
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set_compute_sysval(cmdbuf, dirty_sysvals, local_group_size.y,
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cs->cs.local_size.y);
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set_compute_sysval(cmdbuf, dirty_sysvals, local_group_size.z,
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cs->cs.local_size.z);
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#if PAN_ARCH < 9
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struct panvk_descriptor_state *desc_state =
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&cmdbuf->state.compute.desc_state;
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struct panvk_shader_desc_state *cs_desc_state =
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&cmdbuf->state.compute.cs.desc;
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if (compute_state_dirty(cmdbuf, CS) ||
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compute_state_dirty(cmdbuf, DESC_STATE)) {
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set_compute_sysval(cmdbuf, dirty_sysvals,
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desc.sets[PANVK_DESC_TABLE_CS_DYN_SSBOS],
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cs_desc_state->dyn_ssbos);
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}
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for (uint32_t i = 0; i < MAX_SETS; i++) {
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if (cs->desc_info.used_set_mask & BITFIELD_BIT(i)) {
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set_compute_sysval(cmdbuf, dirty_sysvals, desc.sets[i],
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desc_state->sets[i]->descs.dev);
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}
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}
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#endif
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/* Dirty push_uniforms if the used_sysvals/dirty_sysvals overlap. */
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BITSET_AND(dirty_sysvals, dirty_sysvals, cs->fau.used_sysvals);
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if (!BITSET_IS_EMPTY(dirty_sysvals))
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compute_state_set_dirty(cmdbuf, PUSH_UNIFORMS);
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}
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