mesa/src/intel
Matthew Brost 2a053b2e60 anv/xe: Bind queue per anv_queue
The Xe uAPI is designed to use bind queues such that binds without input
dependencies (sync objects) do not block on binds with input
dependencies.

For example:

- Bind A (sparse) is submitted with a list of input dependencies.
- Bind B (immediate) is subsequently submitted without a list of input
  dependencies.

If Bind A and Bind B share a single bind queue, Bind B will not be
scheduled until Bind A completes. Using individual bind queues decouples
Bind A and Bind B, allowing Bind B to make immediate progress.

This change creates a separate bind queue for each ANV queue, enabling
support for sparse bindings that may have input dependencies.

v2:
 - Bail on bind queue creation failure (Linoel)
 - Only create bind queue if VK_QUEUE_SPARSE_BINDING_BIT is set (Jose)
v3:
 - Add comment around submit->queue usage (Jose)

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32873>
2025-01-14 14:39:53 +00:00
..
blorp blorp: Use 3DSTATE_URB_ALLOC_* instructions 2025-01-09 21:26:40 +00:00
ci anv/ci: Increase anv-tgl-angle parallelism to 2 2025-01-09 12:24:34 +00:00
common intel/tests: Fix missing assignment of error condition 2025-01-03 00:53:49 +00:00
compiler intel/brw: Rename brw_fs_validate to brw_validate 2025-01-13 23:56:22 +00:00
decoder intel/decoder: Avoid duplicate symbols when expat is not available 2025-01-08 18:58:35 +00:00
dev intel: Set correct maxComputeSharedMemorySize for Xe3+ 2025-01-07 07:06:09 +00:00
ds intel : Expose Shader hashes for utrace and Perfetto 2025-01-10 17:38:16 +00:00
executor intel/executor: Add example using scalar register and send gather 2024-12-13 02:18:15 +00:00
genxml intel/genxml: define MEMORYADDRESSATTRIBUTES for Gen12.5 with TILEF 2025-01-10 21:45:04 +00:00
isl isl: disable aux when creating uncompressed TileY/Tile64 surfaces from compressed ones 2024-12-23 19:33:36 +00:00
nullhw-layer build: pass licensing information in SPDX form 2024-06-29 12:42:49 -07:00
perf anv: Protect memcpy/memset/qsort calls against NULL arguments 2024-11-14 01:05:01 +00:00
shaders intel: fix generation shader on Gfx9 2025-01-09 18:12:47 +00:00
tools intel/hang_replay: remove EXEC_OBJECT_WRITE 2024-10-04 21:37:41 +00:00
vulkan anv/xe: Bind queue per anv_queue 2025-01-14 14:39:53 +00:00
vulkan_hasvk intel : Expose Shader hashes for utrace and Perfetto 2025-01-10 17:38:16 +00:00
meson.build intel: Add executor tool 2024-08-14 03:03:46 +00:00