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656d7e887a
When multiview is used and the FS is compiled separately with GPL, the view index still needs to be lowered, otherwise it's crashing later. The lowering doesn't need to know the previous stage because ViewIndex is a global thing (ie. it's neither a per-vertex or a per-primitive varying). This fixes recent dEQP-VK.pipeline.pipeline_library.graphics_library.misc.other.view_index_from_device_index_*_pre_rasterization Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31192>
95 lines
3.1 KiB
C
95 lines
3.1 KiB
C
/*
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* Copyright © 2023 Valve Corporation
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*
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* SPDX-License-Identifier: MIT
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*/
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#ifndef RADV_NIR_H
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#define RADV_NIR_H
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#include <stdbool.h>
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#include <stdint.h>
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#include "amd_family.h"
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#include "nir.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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typedef struct nir_shader nir_shader;
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struct radeon_info;
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struct radv_pipeline_layout;
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struct radv_shader_stage;
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struct radv_shader_info;
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struct radv_shader_args;
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struct radv_shader_layout;
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struct radv_device;
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struct radv_graphics_state_key;
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void radv_nir_apply_pipeline_layout(nir_shader *shader, struct radv_device *device,
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const struct radv_shader_stage *stage);
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void radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, const struct radv_shader_stage *stage,
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const struct radv_graphics_state_key *gfx_state, uint32_t address32_hi);
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bool radv_nir_lower_hit_attrib_derefs(nir_shader *shader);
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bool radv_nir_lower_ray_payload_derefs(nir_shader *shader, uint32_t offset);
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bool radv_nir_lower_ray_queries(nir_shader *shader, struct radv_device *device);
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bool radv_nir_lower_vs_inputs(nir_shader *shader, const struct radv_shader_stage *vs_stage,
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const struct radv_graphics_state_key *gfx_state, const struct radeon_info *gpu_info);
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bool radv_nir_lower_primitive_shading_rate(nir_shader *nir, enum amd_gfx_level gfx_level);
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bool radv_nir_lower_fs_intrinsics(nir_shader *nir, const struct radv_shader_stage *fs_stage,
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const struct radv_graphics_state_key *gfx_state);
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bool radv_nir_lower_fs_barycentric(nir_shader *shader, const struct radv_graphics_state_key *gfx_state,
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unsigned rast_prim);
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bool radv_nir_lower_intrinsics_early(nir_shader *nir, bool lower_view_index_to_zero);
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bool radv_nir_lower_view_index(nir_shader *nir);
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bool radv_nir_lower_viewport_to_zero(nir_shader *nir);
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bool radv_nir_export_multiview(nir_shader *nir);
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void radv_nir_lower_io_to_scalar_early(nir_shader *nir, nir_variable_mode mask);
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unsigned radv_map_io_driver_location(unsigned semantic);
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void radv_nir_lower_io(struct radv_device *device, nir_shader *nir);
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bool radv_nir_lower_io_to_mem(struct radv_device *device, struct radv_shader_stage *stage);
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void radv_nir_lower_poly_line_smooth(nir_shader *nir, const struct radv_graphics_state_key *gfx_state);
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bool radv_nir_lower_cooperative_matrix(nir_shader *shader, unsigned wave_size);
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bool radv_nir_lower_draw_id_to_zero(nir_shader *shader);
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bool radv_nir_remap_color_attachment(nir_shader *shader, const struct radv_graphics_state_key *gfx_state);
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typedef struct radv_nir_opt_tid_function_options {
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bool use_masked_swizzle_amd : 1;
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bool use_dpp16_shift_amd : 1;
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bool use_shuffle_xor : 1;
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bool use_clustered_rotate : 1;
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/* The can be smaller than the api subgroup/ballot size
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* if some invocations are always inactive.
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*/
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uint8_t hw_subgroup_size;
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uint8_t hw_ballot_bit_size;
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uint8_t hw_ballot_num_comp;
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} radv_nir_opt_tid_function_options;
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bool radv_nir_opt_tid_function(nir_shader *shader, const radv_nir_opt_tid_function_options *options);
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#ifdef __cplusplus
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}
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#endif
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#endif /* RADV_NIR_H */
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