Kenneth Graunke 1dfed59c49 intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs ... We were not using the minimum values from devinfo for anything. For tessellation control, the minimum value is 0, so we continue taking MAX2 of that with 1 when tessellation is enabled so we have at least something guaranteed to be present. For geometry, the minimum value is already non-zero (and updated by the previous patch). This will have the side-effect of raising the minimum number of URB entries for geometry stages. This is currently not known to fix anything, but should be more closely following the documentation. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33764>		2025-03-10 17:23:07 -07:00
..
i915	intel/common: Retry GEM_CONTEXT_CREATE when PXP have not finished initialization	2025-03-06 16:25:03 +00:00
tests	intel/common: fix mi_builder_test issue	2025-02-04 12:57:19 +00:00
xe	intel: Add function to check if PXP is supported in Xe KMD	2025-03-06 16:25:04 +00:00
intel_aux_map.c	intel: replace (uint64_t - uint64_t) > 0 with uint64_t > uint64_t	2024-09-16 17:12:17 +00:00
intel_aux_map.h	intel/isl: Add and use ISL_MAIN_TO_CCS_SIZE_RATIO_XE	2024-06-06 23:57:52 +00:00
intel_bind_timeline.c	intel/common: Add functions to handle async vm bind	2024-02-09 20:24:48 +00:00
intel_bind_timeline.h	intel/common: Add functions to handle async vm bind	2024-02-09 20:24:48 +00:00
intel_buffer_alloc.h
intel_clflushopt.c	intel/clflush: Add support for clflushopt instruction	2023-09-06 01:39:53 +00:00
intel_common.c	intel/common: fix building error in intel_common.c	2024-07-02 23:35:26 +00:00
intel_common.h	intel/dev: Add engine_class_supported_count to intel_device_info	2024-06-25 14:16:45 +00:00
intel_compute_slm.c	intel: Compute the optimal preferred SLM size per subslice	2024-05-30 16:46:16 +00:00
intel_compute_slm.h	intel: Compute the optimal preferred SLM size per subslice	2024-05-30 16:46:16 +00:00
intel_debug_identifier.c	intel: Avoid unaligned pointer access	2024-11-14 01:05:02 +00:00
intel_debug_identifier.h	intel: move debug identifier out of libintel_dev	2024-05-11 01:52:01 +00:00
intel_engine.c	intel: Remove INTEL_ENGINE_CLASS_COMPUTE and INTEL_ENGINE_CLASS_COPY parameters	2024-08-13 21:15:31 +00:00
intel_engine.h	intel/common: Implement Xe KMD in mi_builder tests	2024-11-20 01:47:04 +00:00
intel_gem.c	intel: Add function to check if PXP is supported in Xe KMD	2025-03-06 16:25:04 +00:00
intel_gem.h	anv/drirc: add option to provide low latency hint	2024-06-28 21:45:59 +00:00
intel_genX_state_brw.h	intel/common/xe2+: Allow SIMD32 PS for all multisample cases.	2025-01-29 23:39:32 +00:00
intel_genX_state_elk.h	intel/elk: Remove multi-polygon support	2024-03-07 15:53:19 +00:00
intel_guardband.h
intel_hang_dump.h	intel/tools: hang viewer/editor	2023-12-04 14:51:29 +00:00
intel_l3_config.c	intel/dev: Add Xe3 support to get_l3_list()	2024-10-26 07:39:30 +00:00
intel_l3_config.h	intel/common: provide a helper for urb setup comparison	2024-02-05 13:50:58 +00:00
intel_measure.c	intel/measure: increase size of filename malloc to account for \0	2024-11-06 22:12:29 +00:00
intel_measure.h	intel/measure: defer file open until first write	2024-11-04 20:25:14 +00:00
intel_mem.c	intel/clflush: Utilize clflushopt in intel_invalidate_range	2024-07-20 16:10:16 +00:00
intel_mem.h	intel/clflush: Add support for clflushopt instruction	2023-09-06 01:39:53 +00:00
intel_pixel_hash.h	intel: Improve N-way pixel hashing computation to handle pixel pipes with asymmetric processing power.	2023-11-20 23:48:34 +00:00
intel_sample_positions.c
intel_sample_positions.h
intel_tiled_render.h	intel/xehp+: Import algorithm for TBIMR tiling parameter calculation.	2023-10-27 14:48:29 -07:00
intel_urb_config.c	intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs	2025-03-10 17:23:07 -07:00
intel_uuid.c
intel_uuid.h
meson.build	meson: project-wide fs = import('fs')	2025-01-28 23:01:32 +00:00
mi_builder.h	intel/mi_builder: enable control flow API on Gfx9+	2024-08-06 17:55:19 +00:00