Sagar Ghuge 5f1f67358c blorp: Set TG size based on number of threads ... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com> Reviewed-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35904>		2025-07-10 22:08:36 +00:00
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blorp	blorp: Set TG size based on number of threads	2025-07-10 22:08:36 +00:00
ci	hasvk/ci: disable jobs on anholt farm	2025-07-10 18:15:36 +00:00
common	intel/common: Add helper for compute thread group dispatch size	2025-07-10 22:08:36 +00:00
compiler	brw/nir: Use nir_opt_reassociate_matrix_mul	2025-07-09 19:28:49 +00:00
decoder	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
dev	intel: Add env variable to add break point on/before compute dispatch	2025-07-07 17:43:40 +00:00
ds	intel/ds: Fix formatting of stage index.	2025-05-08 01:21:25 +00:00
executor	intel/executor: Add missing dependency to fix intermittent build failures	2025-07-07 18:35:56 +00:00
genxml	intel: Generate files with newline at end	2025-06-24 14:01:04 +00:00
isl	isl: handle DISABLE_AUX in get_mcs_surf	2025-06-23 05:45:24 +00:00
nullhw-layer	meson: include VkLayer_INTEL_nullhw in the devenv	2025-06-20 21:51:17 +00:00
perf	intel: fix monitor build dependencies	2025-06-22 10:55:21 +00:00
shaders	intel: use common CL args	2025-03-06 00:43:59 +00:00
tools	intel: fix monitor build dependencies	2025-06-22 10:55:21 +00:00
vulkan	anv: Program DispatchWalkOrder and ThreadGroupBatchSize with optimized values for regular computer walkers	2025-07-10 20:54:30 +00:00
vulkan_hasvk	hasvk: use AHARDWAREBUFFER_USAGE_CAMERA_MASK	2025-07-09 03:47:07 +00:00
meson.build	intel: Add meson option -Dintel-elk	2025-01-30 00:45:59 +00:00