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386 lines
7.9 KiB
C
386 lines
7.9 KiB
C
/*
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* (C) Copyright IBM Corporation 2008
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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/**
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* \file
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* Real-time assembly generation interface for Cell B.E. SPEs.
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*
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* \author Ian Romanick <idr@us.ibm.com>
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*/
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#include "pipe/p_compiler.h"
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#include "pipe/p_util.h"
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#include "rtasm_ppc_spe.h"
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#ifdef GALLIUM_CELL
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/**
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* SPE instruction types
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*
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* There are 6 primary instruction encodings used on the Cell's SPEs. Each of
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* the following unions encodes one type.
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*
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* \bug
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* If, at some point, we start generating SPE code from a little-endian host
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* these unions will not work.
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*/
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/*@{*/
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/**
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* Encode one output register with two input registers
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*/
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union spe_inst_RR {
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uint32_t bits;
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struct {
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unsigned op:11;
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unsigned rB:7;
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unsigned rA:7;
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unsigned rT:7;
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} inst;
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};
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/**
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* Encode one output register with three input registers
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*/
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union spe_inst_RRR {
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uint32_t bits;
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struct {
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unsigned op:4;
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unsigned rT:7;
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unsigned rB:7;
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unsigned rA:7;
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unsigned rC:7;
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} inst;
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};
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/**
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* Encode one output register with one input reg. and a 7-bit signed immed
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*/
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union spe_inst_RI7 {
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uint32_t bits;
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struct {
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unsigned op:11;
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unsigned i7:7;
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unsigned rA:7;
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unsigned rT:7;
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} inst;
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};
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/**
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* Encode one output register with one input reg. and an 8-bit signed immed
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*/
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union spe_inst_RI8 {
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uint32_t bits;
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struct {
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unsigned op:10;
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unsigned i8:8;
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unsigned rA:7;
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unsigned rT:7;
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} inst;
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};
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/**
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* Encode one output register with one input reg. and a 10-bit signed immed
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*/
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union spe_inst_RI10 {
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uint32_t bits;
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struct {
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unsigned op:8;
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unsigned i10:10;
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unsigned rA:7;
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unsigned rT:7;
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} inst;
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};
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/**
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* Encode one output register with a 16-bit signed immediate
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*/
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union spe_inst_RI16 {
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uint32_t bits;
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struct {
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unsigned op:9;
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unsigned i16:16;
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unsigned rT:7;
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} inst;
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};
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/**
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* Encode one output register with a 18-bit signed immediate
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*/
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union spe_inst_RI18 {
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uint32_t bits;
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struct {
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unsigned op:7;
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unsigned i18:18;
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unsigned rT:7;
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} inst;
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};
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/*@}*/
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static void emit_RR(struct spe_function *p, unsigned op, unsigned rT,
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unsigned rA, unsigned rB)
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{
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union spe_inst_RR inst;
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inst.inst.op = op;
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inst.inst.rB = rB;
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inst.inst.rA = rA;
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inst.inst.rT = rT;
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*p->csr = inst.bits;
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p->csr++;
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}
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static void emit_RRR(struct spe_function *p, unsigned op, unsigned rT,
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unsigned rA, unsigned rB, unsigned rC)
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{
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union spe_inst_RRR inst;
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inst.inst.op = op;
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inst.inst.rT = rT;
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inst.inst.rB = rB;
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inst.inst.rA = rA;
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inst.inst.rC = rC;
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*p->csr = inst.bits;
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p->csr++;
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}
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static void emit_RI7(struct spe_function *p, unsigned op, unsigned rT,
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unsigned rA, int imm)
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{
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union spe_inst_RI7 inst;
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inst.inst.op = op;
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inst.inst.i7 = imm;
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inst.inst.rA = rA;
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inst.inst.rT = rT;
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*p->csr = inst.bits;
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p->csr++;
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}
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static void emit_RI8(struct spe_function *p, unsigned op, unsigned rT,
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unsigned rA, int imm)
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{
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union spe_inst_RI8 inst;
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inst.inst.op = op;
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inst.inst.i8 = imm;
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inst.inst.rA = rA;
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inst.inst.rT = rT;
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*p->csr = inst.bits;
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p->csr++;
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}
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static void emit_RI10(struct spe_function *p, unsigned op, unsigned rT,
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unsigned rA, int imm)
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{
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union spe_inst_RI10 inst;
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inst.inst.op = op;
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inst.inst.i10 = imm;
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inst.inst.rA = rA;
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inst.inst.rT = rT;
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*p->csr = inst.bits;
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p->csr++;
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}
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static void emit_RI16(struct spe_function *p, unsigned op, unsigned rT,
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int imm)
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{
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union spe_inst_RI16 inst;
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inst.inst.op = op;
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inst.inst.i16 = imm;
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inst.inst.rT = rT;
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*p->csr = inst.bits;
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p->csr++;
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}
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static void emit_RI18(struct spe_function *p, unsigned op, unsigned rT,
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int imm)
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{
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union spe_inst_RI18 inst;
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inst.inst.op = op;
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inst.inst.i18 = imm;
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inst.inst.rT = rT;
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*p->csr = inst.bits;
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p->csr++;
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}
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#define EMIT_(_name, _op) \
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void _name (struct spe_function *p, unsigned rT) \
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{ \
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emit_RR(p, _op, rT, 0, 0); \
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}
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#define EMIT_R(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, unsigned rA) \
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{ \
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emit_RR(p, _op, rT, rA, 0); \
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}
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#define EMIT_RR(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB) \
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{ \
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emit_RR(p, _op, rT, rA, rB); \
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}
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#define EMIT_RRR(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, unsigned rA, unsigned rB, unsigned rC) \
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{ \
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emit_RRR(p, _op, rT, rA, rB, rC); \
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}
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#define EMIT_RI7(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
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{ \
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emit_RI7(p, _op, rT, rA, imm); \
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}
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#define EMIT_RI8(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
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{ \
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emit_RI8(p, _op, rT, rA, 155 - imm); \
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}
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#define EMIT_RI10(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, unsigned rA, int imm) \
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{ \
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emit_RI10(p, _op, rT, rA, imm); \
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}
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#define EMIT_RI16(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, int imm) \
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{ \
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emit_RI16(p, _op, rT, imm); \
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}
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#define EMIT_RI18(_name, _op) \
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void _name (struct spe_function *p, unsigned rT, int imm) \
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{ \
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emit_RI18(p, _op, rT, imm); \
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}
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#define EMIT_I16(_name, _op) \
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void _name (struct spe_function *p, int imm) \
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{ \
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emit_RI16(p, _op, 0, imm); \
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}
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#include "rtasm_ppc_spe.h"
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/*
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*/
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void spe_init_func(struct spe_function *p, unsigned code_size)
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{
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p->store = align_malloc(code_size, 16);
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p->csr = p->store;
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}
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void spe_release_func(struct spe_function *p)
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{
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align_free(p->store);
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p->store = NULL;
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p->csr = NULL;
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}
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void spe_bi(struct spe_function *p, unsigned rA, int d, int e)
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{
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emit_RI7(p, 0x1a8, 0, rA, (d << 5) | (e << 4));
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}
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void spe_iret(struct spe_function *p, unsigned rA, int d, int e)
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{
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emit_RI7(p, 0x1aa, 0, rA, (d << 5) | (e << 4));
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}
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void spe_bisled(struct spe_function *p, unsigned rT, unsigned rA, int d,
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int e)
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{
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emit_RI7(p, 0x1ab, rT, rA, (d << 5) | (e << 4));
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}
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void spe_bisl(struct spe_function *p, unsigned rT, unsigned rA, int d,
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int e)
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{
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emit_RI7(p, 0x1a9, rT, rA, (d << 5) | (e << 4));
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}
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void spe_biz(struct spe_function *p, unsigned rT, unsigned rA, int d,
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int e)
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{
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emit_RI7(p, 0x128, rT, rA, (d << 5) | (e << 4));
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}
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void spe_binz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
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{
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emit_RI7(p, 0x129, rT, rA, (d << 5) | (e << 4));
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}
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void spe_bihz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
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{
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emit_RI7(p, 0x12a, rT, rA, (d << 5) | (e << 4));
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}
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void spe_bihnz(struct spe_function *p, unsigned rT, unsigned rA, int d, int e)
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{
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emit_RI7(p, 0x12b, rT, rA, (d << 5) | (e << 4));
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}
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/* Hint-for-branch instructions
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*/
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#if 0
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hbr;
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hbra;
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hbrr;
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#endif
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/* Control instructions
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*/
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#if 0
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stop;
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EMIT_RR (spe_stopd, 0x140);
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EMIT_ (spe_lnop, 0x001);
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EMIT_ (spe_nop, 0x201);
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sync;
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EMIT_ (spe_dsync, 0x003);
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EMIT_R (spe_mfspr, 0x00c);
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EMIT_R (spe_mtspr, 0x10c);
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#endif
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#endif /* GALLIUM_CELL */
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