Samuel Pitoiset 5b6207b282 radv: only set valid bitfields for CB/DS surfaces address on GFX12 ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29566>		2024-06-06 15:42:35 +00:00
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addrlib	amd: add more gfx11 APUs	2024-05-24 13:48:28 +00:00
ci	radv/ci: move radv manual rules into their own group	2024-06-06 13:00:04 +00:00
common	ac/nir: skip subgroup_id/local_invocation_index lowering for gfx12	2024-06-06 14:26:52 +00:00
compiler	aco: implement nir_intrinsic_nop_amd and nir_intrinsic_sleep_amd	2024-06-06 14:26:52 +00:00
drm-shim	amd: Use align64 instead of ALIGN for 64 bit value parameter	2024-01-03 22:02:17 +00:00
llvm	ac/llvm: implement load_subgroup_id	2024-06-06 14:26:51 +00:00
registers	amd: add gfx12 register definitions	2024-05-11 22:14:05 -04:00
vpelib	amd/vpelib: Bypass de/regam on HLG	2024-05-07 20:43:02 +00:00
vulkan	radv: only set valid bitfields for CB/DS surfaces address on GFX12	2024-06-06 15:42:35 +00:00
meson.build	build/amd: add amd-use-llvm build option	2024-05-30 19:05:00 +00:00