mesa/src/amd
Samuel Pitoiset 5b5d5554f6 radv: respect the render area for depth/stencil resolves
Subpass resolves don't necessarily start from 0,0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17950>
2022-08-10 06:17:06 +00:00
..
addrlib amd/addrlib: fix 3D texture allocation failures on gfx11 2022-08-03 00:57:16 +00:00
ci radv/ci: Put one more board to run the CTS on Stoney Ridge 2022-08-09 15:39:41 +00:00
common ac/nir/cull: Fix typo in bounding box culling. 2022-08-08 11:16:04 +00:00
compiler aco: improve VcmpxPermlaneHazard workaround 2022-08-08 13:59:17 +00:00
drm-shim Use proper types for meson objects 2022-04-18 13:03:08 +03:00
llvm ac/llvm: remove all resinfo code now that it's lowered 2022-08-03 17:44:15 +00:00
registers radeonsi: follow shader_info.float_controls_execution_mode (mostly) 2022-08-03 00:57:16 +00:00
vulkan radv: respect the render area for depth/stencil resolves 2022-08-10 06:17:06 +00:00
.clang-format radv: allow holes in inline push constants 2022-04-12 11:44:30 +00:00
meson.build r300/r600: Add drm-shim support. 2022-02-02 00:59:08 +00:00