mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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for all ALU instructions except fneg instead of using nir_opt_algebraic for a small subset. Totals from 17711 (8.49% of 208640) affected shaders: (Navi48) MaxWaves: 364391 -> 364397 (+0.00%); split: +0.01%, -0.01% Instrs: 33873994 -> 33780398 (-0.28%); split: -0.31%, +0.03% CodeSize: 198627596 -> 198259724 (-0.19%); split: -0.23%, +0.05% VGPRs: 1435516 -> 1435144 (-0.03%); split: -0.04%, +0.02% SpillSGPRs: 652827 -> 654577 (+0.27%); split: -0.00%, +0.27% SpillVGPRs: 594840 -> 593598 (-0.21%); split: -0.28%, +0.07% Scratch: 31791360 -> 31543552 (-0.78%) Latency: 417824569 -> 415881858 (-0.46%); split: -0.48%, +0.02% InvThroughput: 80376232 -> 80307996 (-0.08%); split: -0.10%, +0.01% VClause: 557238 -> 554770 (-0.44%); split: -0.50%, +0.06% SClause: 688297 -> 688125 (-0.02%); split: -0.04%, +0.02% Copies: 3571756 -> 3566704 (-0.14%); split: -0.44%, +0.29% Branches: 628710 -> 628576 (-0.02%); split: -0.07%, +0.05% PreSGPRs: 1100316 -> 1103478 (+0.29%); split: -0.02%, +0.30% PreVGPRs: 1132139 -> 1128765 (-0.30%); split: -0.30%, +0.00% VALU: 18944830 -> 18912030 (-0.17%); split: -0.20%, +0.03% SALU: 4363054 -> 4342748 (-0.47%); split: -0.57%, +0.10% VMEM: 1894420 -> 1891754 (-0.14%); split: -0.19%, +0.05% SMEM: 1073860 -> 1073741 (-0.01%); split: -0.01%, +0.00% VOPD: 1734659 -> 1735718 (+0.06%); split: +0.20%, -0.14% Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40848>
626 lines
20 KiB
C
626 lines
20 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <math.h>
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#include "nir.h"
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#include "nir_builder.h"
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#include "nir_constant_expressions.h"
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#include "nir_deref.h"
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/*
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* Implements SSA-based constant folding.
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*/
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struct constant_fold_state {
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bool has_load_constant;
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bool has_indirect_load_const;
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};
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static nir_def *
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const_value_for_alu(nir_builder *b, nir_alu_instr *alu, unsigned bit_size,
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nir_const_value src[NIR_ALU_MAX_INPUTS][NIR_MAX_VEC_COMPONENTS])
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{
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nir_const_value dest[NIR_MAX_VEC_COMPONENTS];
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nir_const_value *srcs[NIR_ALU_MAX_INPUTS];
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memset(dest, 0, sizeof(dest));
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for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; ++i)
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srcs[i] = src[i];
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nir_eval_const_opcode(alu->op, dest, NULL, alu->def.num_components,
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bit_size, srcs,
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b->shader->info.float_controls_execution_mode);
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return nir_build_imm(b, alu->def.num_components, alu->def.bit_size,
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dest);
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}
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static bool
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is_bcsel_with_two_constants(nir_alu_instr *bcsel)
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{
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return bcsel && bcsel->op == nir_op_bcsel &&
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bcsel->def.num_components == 1 &&
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bcsel->src[0].swizzle[0] == 0 &&
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bcsel->src[0].src.ssa->num_components == 1 &&
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nir_src_is_const(bcsel->src[1].src) &&
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nir_src_is_const(bcsel->src[2].src);
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}
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static bool
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should_fold_bcsel(nir_alu_instr *alu)
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{
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/* Don't fold bcsel if the resulting bit size is larger than 32 bit
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* as these commonly require two instructions.
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*/
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if (alu->def.bit_size > 32)
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return false;
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/* Don't fight with nir_lower_load_const_to_scalar. */
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if (nir_op_is_vec_or_mov(alu->op))
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return false;
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/* Make an exception for fneg, because in many cases it can be
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* folded with the next instruction.
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*/
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return alu->op != nir_op_fneg;
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}
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nir_def *
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nir_try_constant_fold_alu(nir_builder *b, nir_alu_instr *alu)
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{
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nir_const_value src[NIR_ALU_MAX_INPUTS][NIR_MAX_VEC_COMPONENTS];
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nir_def *bcsel = NULL;
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/* In the case that any outputs/inputs have unsized types, then we need to
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* guess the bit-size. In this case, the validator ensures that all
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* bit-sizes match so we can just take the bit-size from first
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* output/input with an unsized type. If all the outputs/inputs are sized
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* then we don't need to guess the bit-size at all because the code we
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* generate for constant opcodes in this case already knows the sizes of
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* the types involved and does not need the provided bit-size for anything
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* (although it still requires to receive a valid bit-size).
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*/
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unsigned bit_size = 0;
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if (!nir_alu_type_get_type_size(nir_op_infos[alu->op].output_type))
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bit_size = alu->def.bit_size;
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for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
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if (bit_size == 0 &&
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!nir_alu_type_get_type_size(nir_op_infos[alu->op].input_types[i]))
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bit_size = alu->src[i].src.ssa->bit_size;
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nir_load_const_instr *load_const = nir_src_as_load_const(alu->src[i].src);
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if (load_const) {
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for (unsigned j = 0; j < nir_ssa_alu_instr_src_components(alu, i); j++)
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src[i][j] = load_const->value[alu->src[i].swizzle[j]];
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continue;
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}
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/* Check if the source is a bcsel with two constants. */
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nir_alu_instr *bcsel_alu = nir_src_as_alu(alu->src[i].src);
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if (should_fold_bcsel(alu) && is_bcsel_with_two_constants(bcsel_alu)) {
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/* If there is multiple bcsel sources, they must use the same condition. */
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if (bcsel && bcsel_alu->src[0].src.ssa != bcsel)
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return false;
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bcsel = bcsel_alu->src[0].src.ssa;
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/* Use first bcsel constant. */
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load_const = nir_src_as_load_const(bcsel_alu->src[1].src);
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for (unsigned j = 0; j < nir_ssa_alu_instr_src_components(alu, i); j++)
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src[i][j] = load_const->value[bcsel_alu->src[1].swizzle[alu->src[i].swizzle[j]]];
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} else {
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return NULL;
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}
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}
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if (bit_size == 0)
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bit_size = 32;
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/* If all sources are constant, we can fold the ALU. */
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if (!bcsel)
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return const_value_for_alu(b, alu, bit_size, src);
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/* At least one source is a bcsel with two constants. Fold the ALU twice
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* and create a new bcsel, selecting between the folded values.
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*/
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nir_def *then_const = const_value_for_alu(b, alu, bit_size, src);
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/* Create second bcsel constant. */
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for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
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nir_alu_instr *bcsel_alu = nir_src_as_alu(alu->src[i].src);
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if (!bcsel_alu)
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continue;
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nir_load_const_instr *load_const = nir_src_as_load_const(bcsel_alu->src[2].src);
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for (unsigned j = 0; j < nir_ssa_alu_instr_src_components(alu, i); j++) {
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src[i][j] = load_const->value[bcsel_alu->src[2].swizzle[alu->src[i].swizzle[j]]];
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}
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}
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nir_def *else_const = const_value_for_alu(b, alu, bit_size, src);
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return nir_bcsel(b, bcsel, then_const, else_const);
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}
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static nir_const_value *
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const_value_for_deref(nir_deref_instr *deref)
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{
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if (!nir_deref_mode_is(deref, nir_var_mem_constant))
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return NULL;
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nir_deref_path path;
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nir_deref_path_init(&path, deref, NULL);
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if (path.path[0]->deref_type != nir_deref_type_var)
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goto fail;
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nir_variable *var = path.path[0]->var;
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assert(var->data.mode == nir_var_mem_constant);
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if (var->constant_initializer == NULL)
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goto fail;
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if (var->constant_initializer->is_null_constant) {
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/* Doesn't matter what casts are in the way, it's all zeros */
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nir_deref_path_finish(&path);
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return var->constant_initializer->values;
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}
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nir_constant *c = var->constant_initializer;
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nir_const_value *v = NULL; /* Vector value for array-deref-of-vec */
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for (unsigned i = 1; path.path[i] != NULL; i++) {
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nir_deref_instr *p = path.path[i];
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switch (p->deref_type) {
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case nir_deref_type_var:
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UNREACHABLE("Deref paths can only start with a var deref");
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case nir_deref_type_array: {
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assert(v == NULL);
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if (!nir_src_is_const(p->arr.index))
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goto fail;
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uint64_t idx = nir_src_as_uint(p->arr.index);
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if (c->num_elements > 0) {
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assert(glsl_type_is_array(path.path[i - 1]->type));
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if (idx >= c->num_elements)
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goto fail;
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c = c->elements[idx];
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} else {
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assert(glsl_type_is_vector(path.path[i - 1]->type));
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assert(glsl_type_is_scalar(p->type));
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if (idx >= NIR_MAX_VEC_COMPONENTS)
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goto fail;
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v = &c->values[idx];
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}
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break;
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}
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case nir_deref_type_struct:
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assert(glsl_type_is_struct(path.path[i - 1]->type));
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assert(v == NULL && c->num_elements > 0);
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if (p->strct.index >= c->num_elements)
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goto fail;
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c = c->elements[p->strct.index];
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break;
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default:
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goto fail;
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}
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}
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/* We have to have ended at a vector */
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assert(c->num_elements == 0);
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nir_deref_path_finish(&path);
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return v ? v : c->values;
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fail:
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nir_deref_path_finish(&path);
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return NULL;
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}
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static bool
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is_dual_slot_io(nir_intrinsic_instr *intrin)
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{
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if (intrin->intrinsic == nir_intrinsic_store_output ||
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intrin->intrinsic == nir_intrinsic_store_per_vertex_output ||
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intrin->intrinsic == nir_intrinsic_store_per_view_output ||
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intrin->intrinsic == nir_intrinsic_store_per_primitive_output) {
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return nir_src_bit_size(intrin->src[0]) == 64 &&
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nir_src_num_components(intrin->src[0]) >= 3;
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}
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return intrin->def.bit_size == 64 &&
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intrin->def.num_components >= 3;
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}
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static nir_def *
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try_fold_intrinsic(nir_builder *b, nir_intrinsic_instr *intrin,
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struct constant_fold_state *state)
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{
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switch (intrin->intrinsic) {
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case nir_intrinsic_demote_if:
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case nir_intrinsic_terminate_if:
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if (nir_src_is_const(intrin->src[0])) {
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if (nir_src_as_bool(intrin->src[0])) {
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nir_intrinsic_op op;
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switch (intrin->intrinsic) {
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case nir_intrinsic_demote_if:
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op = nir_intrinsic_demote;
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break;
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case nir_intrinsic_terminate_if:
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op = nir_intrinsic_terminate;
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break;
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default:
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UNREACHABLE("invalid intrinsic");
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}
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nir_intrinsic_instr *new_instr =
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nir_intrinsic_instr_create(b->shader, op);
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nir_builder_instr_insert(b, &new_instr->instr);
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}
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return NIR_LOWER_INSTR_PROGRESS_REPLACE;
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}
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return NULL;
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case nir_intrinsic_load_deref: {
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nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
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nir_const_value *v = const_value_for_deref(deref);
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if (v) {
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return nir_build_imm(b, intrin->def.num_components,
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intrin->def.bit_size, v);
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}
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return NULL;
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}
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case nir_intrinsic_load_constant: {
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state->has_load_constant = true;
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if (!nir_src_is_const(intrin->src[0])) {
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state->has_indirect_load_const = true;
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return NULL;
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}
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unsigned offset = nir_src_as_uint(intrin->src[0]);
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unsigned base = nir_intrinsic_base(intrin);
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unsigned range = nir_intrinsic_range(intrin);
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assert(base + range <= b->shader->constant_data_size);
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nir_def *val;
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if (offset >= range) {
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val = nir_undef(b, intrin->def.num_components,
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intrin->def.bit_size);
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} else {
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nir_const_value imm[NIR_MAX_VEC_COMPONENTS];
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memset(imm, 0, sizeof(imm));
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uint8_t *data = (uint8_t *)b->shader->constant_data + base;
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for (unsigned i = 0; i < intrin->num_components; i++) {
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unsigned bytes = intrin->def.bit_size / 8;
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bytes = MIN2(bytes, range - offset);
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memcpy(&imm[i].u64, data + offset, bytes);
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offset += bytes;
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}
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val = nir_build_imm(b, intrin->def.num_components,
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intrin->def.bit_size, imm);
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}
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return val;
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}
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case nir_intrinsic_ddx:
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case nir_intrinsic_ddx_fine:
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case nir_intrinsic_ddx_coarse:
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case nir_intrinsic_ddy:
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case nir_intrinsic_ddy_fine:
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case nir_intrinsic_ddy_coarse: {
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if (!nir_src_is_const(intrin->src[0]))
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return NULL;
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/* Derivative of a constant is zero, except for NaNs and Infs */
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nir_const_value imm[NIR_MAX_VEC_COMPONENTS];
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unsigned sz = intrin->def.bit_size;
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for (unsigned i = 0; i < intrin->def.num_components; i++) {
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bool finite = isfinite(nir_src_comp_as_float(intrin->src[0], i));
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imm[i] = nir_const_value_for_float(finite ? 0 : NAN, sz);
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}
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return nir_build_imm(b, intrin->def.num_components, sz, imm);
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}
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case nir_intrinsic_vote_any:
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case nir_intrinsic_vote_all:
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case nir_intrinsic_read_invocation:
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case nir_intrinsic_read_first_invocation:
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case nir_intrinsic_as_uniform:
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case nir_intrinsic_shuffle:
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case nir_intrinsic_shuffle_xor:
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case nir_intrinsic_shuffle_up:
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case nir_intrinsic_shuffle_down:
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case nir_intrinsic_quad_broadcast:
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case nir_intrinsic_quad_swap_horizontal:
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case nir_intrinsic_quad_swap_vertical:
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case nir_intrinsic_quad_swap_diagonal:
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case nir_intrinsic_quad_swizzle_amd:
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case nir_intrinsic_masked_swizzle_amd:
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/* All of these have the data payload in the first source. They may
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* have a second source with a shuffle index but that doesn't matter if
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* the data is constant.
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*/
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if (nir_src_is_const(intrin->src[0])) {
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return intrin->src[0].ssa;
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}
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return NULL;
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case nir_intrinsic_vote_feq:
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case nir_intrinsic_vote_ieq:
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if (nir_src_is_const(intrin->src[0])) {
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return nir_imm_true(b);
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}
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return NULL;
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case nir_intrinsic_inverse_ballot: {
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if (!nir_src_is_const(intrin->src[0]))
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return NULL;
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bool constant_true = true;
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bool constant_false = true;
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for (unsigned i = 0; i < nir_src_num_components(intrin->src[0]); i++) {
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int64_t value = nir_src_comp_as_int(intrin->src[0], i);
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constant_true &= value == -1;
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constant_false &= value == 0;
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}
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if (!constant_true && !constant_false)
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return NULL;
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return nir_imm_bool(b, constant_true);
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}
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case nir_intrinsic_ballot_relaxed:
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case nir_intrinsic_ballot: {
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if (!nir_src_is_const(intrin->src[0]) || nir_src_as_bool(intrin->src[0]))
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return NULL;
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return nir_imm_zero(b, intrin->def.num_components, intrin->def.bit_size);
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}
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case nir_intrinsic_load_input:
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case nir_intrinsic_load_per_primitive_input:
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case nir_intrinsic_load_input_vertex:
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case nir_intrinsic_load_per_vertex_input:
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case nir_intrinsic_load_interpolated_input:
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case nir_intrinsic_load_fs_input_interp_deltas:
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case nir_intrinsic_load_output:
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case nir_intrinsic_load_per_vertex_output:
|
|
case nir_intrinsic_load_per_view_output:
|
|
case nir_intrinsic_load_per_primitive_output:
|
|
case nir_intrinsic_store_output:
|
|
case nir_intrinsic_store_per_vertex_output:
|
|
case nir_intrinsic_store_per_view_output:
|
|
case nir_intrinsic_store_per_primitive_output: {
|
|
if (nir_is_input_load(intrin) ?
|
|
b->shader->info.disable_input_offset_src_constant_folding :
|
|
b->shader->info.disable_output_offset_src_constant_folding)
|
|
return NULL;
|
|
|
|
nir_io_semantics sem = nir_intrinsic_io_semantics(intrin);
|
|
|
|
/* NV_mesh_shader: ignore MS primitive indices. */
|
|
if (b->shader->info.stage == MESA_SHADER_MESH &&
|
|
sem.location == VARYING_SLOT_PRIMITIVE_INDICES &&
|
|
!(b->shader->info.per_primitive_outputs &
|
|
VARYING_BIT_PRIMITIVE_INDICES))
|
|
return NULL;
|
|
|
|
nir_src *offset = nir_get_io_offset_src(intrin);
|
|
|
|
/* TODO: Better handling of per-view variables here */
|
|
if (!nir_src_is_const(*offset) ||
|
|
nir_intrinsic_io_semantics(intrin).per_view)
|
|
return NULL;
|
|
|
|
unsigned off = nir_src_as_uint(*offset);
|
|
bool progress = false;
|
|
|
|
if (off) {
|
|
nir_intrinsic_set_base(intrin, nir_intrinsic_base(intrin) + off);
|
|
|
|
sem.location += off;
|
|
b->cursor = nir_before_instr(&intrin->instr);
|
|
nir_src_rewrite(offset, nir_imm_int(b, 0));
|
|
progress = true;
|
|
}
|
|
|
|
/* non-indirect indexing should reduce num_slots */
|
|
sem.num_slots = is_dual_slot_io(intrin) ? 2 : 1;
|
|
|
|
nir_io_semantics original = nir_intrinsic_io_semantics(intrin);
|
|
progress |= memcmp(&original, &sem, sizeof(sem));
|
|
nir_intrinsic_set_io_semantics(intrin, sem);
|
|
return progress ? NIR_LOWER_INSTR_PROGRESS : NULL;
|
|
}
|
|
|
|
default:
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
static bool
|
|
try_fold_txb_to_tex(nir_builder *b, nir_tex_instr *tex)
|
|
{
|
|
assert(tex->op == nir_texop_txb);
|
|
|
|
const int bias_idx = nir_tex_instr_src_index(tex, nir_tex_src_bias);
|
|
|
|
/* nir_to_tgsi_lower_tex mangles many kinds of texture instructions,
|
|
* including txb, into invalid states. It removes the special
|
|
* parameters and appends the values to the texture coordinate.
|
|
*/
|
|
if (bias_idx < 0)
|
|
return false;
|
|
|
|
if (nir_src_is_const(tex->src[bias_idx].src) &&
|
|
nir_src_as_float(tex->src[bias_idx].src) == 0.0) {
|
|
nir_tex_instr_remove_src(tex, bias_idx);
|
|
tex->op = nir_texop_tex;
|
|
return true;
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
static bool
|
|
try_fold_txd_to_txl(nir_builder *b, nir_tex_instr *tex)
|
|
{
|
|
assert(tex->op == nir_texop_txd);
|
|
|
|
const int ddx_idx = nir_tex_instr_src_index(tex, nir_tex_src_ddx);
|
|
const int ddy_idx = nir_tex_instr_src_index(tex, nir_tex_src_ddy);
|
|
const int min_lod_idx = nir_tex_instr_src_index(tex, nir_tex_src_min_lod);
|
|
|
|
if (ddx_idx < 0 || ddx_idx < 0)
|
|
return false;
|
|
|
|
/* min_lod is applied after the sampler bias is added, so we can't use it as lod */
|
|
if (min_lod_idx >= 0)
|
|
return false;
|
|
|
|
if (!nir_src_is_const(tex->src[ddx_idx].src) || !nir_src_is_const(tex->src[ddy_idx].src))
|
|
return false;
|
|
|
|
for (unsigned i = 0; i < tex->src[ddx_idx].src.ssa->num_components; i++) {
|
|
if (nir_src_comp_as_float(tex->src[ddx_idx].src, i) != 0.0)
|
|
return false;
|
|
}
|
|
|
|
for (unsigned i = 0; i < tex->src[ddy_idx].src.ssa->num_components; i++) {
|
|
if (nir_src_comp_as_float(tex->src[ddy_idx].src, i) != 0.0)
|
|
return false;
|
|
}
|
|
|
|
b->cursor = nir_before_instr(&tex->instr);
|
|
nir_steal_tex_src(tex, nir_tex_src_ddx);
|
|
nir_steal_tex_src(tex, nir_tex_src_ddy);
|
|
|
|
nir_def *lod = nir_imm_int(b, 0);
|
|
nir_tex_instr_add_src(tex, nir_tex_src_lod, lod);
|
|
tex->op = nir_texop_txl;
|
|
return true;
|
|
}
|
|
|
|
static bool
|
|
try_fold_tex_offset(nir_tex_instr *tex, unsigned *index,
|
|
nir_tex_src_type src_type)
|
|
{
|
|
const int src_idx = nir_tex_instr_src_index(tex, src_type);
|
|
if (src_idx < 0)
|
|
return false;
|
|
|
|
if (!nir_src_is_const(tex->src[src_idx].src))
|
|
return false;
|
|
|
|
*index += nir_src_as_uint(tex->src[src_idx].src);
|
|
nir_tex_instr_remove_src(tex, src_idx);
|
|
|
|
return true;
|
|
}
|
|
|
|
static bool
|
|
try_fold_texel_offset_src(nir_tex_instr *tex)
|
|
{
|
|
int offset_src = nir_tex_instr_src_index(tex, nir_tex_src_offset);
|
|
if (offset_src < 0)
|
|
return false;
|
|
|
|
unsigned size = nir_tex_instr_src_size(tex, offset_src);
|
|
nir_tex_src *src = &tex->src[offset_src];
|
|
|
|
for (unsigned i = 0; i < size; i++) {
|
|
nir_scalar comp = nir_scalar_resolved(src->src.ssa, i);
|
|
if (!nir_scalar_is_const(comp) || nir_scalar_as_uint(comp) != 0)
|
|
return false;
|
|
}
|
|
|
|
nir_tex_instr_remove_src(tex, offset_src);
|
|
|
|
return true;
|
|
}
|
|
|
|
static nir_def *
|
|
try_fold_tex(nir_builder *b, nir_tex_instr *tex)
|
|
{
|
|
bool progress = false;
|
|
|
|
progress |= try_fold_tex_offset(tex, &tex->texture_index,
|
|
nir_tex_src_texture_offset);
|
|
progress |= try_fold_tex_offset(tex, &tex->sampler_index,
|
|
nir_tex_src_sampler_offset);
|
|
|
|
/* txb with a bias of constant zero is just tex. */
|
|
if (tex->op == nir_texop_txb)
|
|
progress |= try_fold_txb_to_tex(b, tex);
|
|
/* txd with ddx/ddy of constant zero is just txl. */
|
|
if (tex->op == nir_texop_txd)
|
|
progress |= try_fold_txd_to_txl(b, tex);
|
|
|
|
/* tex with a zero offset is just tex. */
|
|
progress |= try_fold_texel_offset_src(tex);
|
|
|
|
return progress ? NIR_LOWER_INSTR_PROGRESS : NULL;
|
|
}
|
|
|
|
static nir_def *
|
|
try_fold_instr(nir_builder *b, nir_instr *instr, void *_state)
|
|
{
|
|
switch (instr->type) {
|
|
case nir_instr_type_alu:
|
|
return nir_try_constant_fold_alu(b, nir_instr_as_alu(instr));
|
|
case nir_instr_type_intrinsic:
|
|
return try_fold_intrinsic(b, nir_instr_as_intrinsic(instr), _state);
|
|
case nir_instr_type_tex:
|
|
return try_fold_tex(b, nir_instr_as_tex(instr));
|
|
default:
|
|
/* Don't know how to constant fold */
|
|
return NULL;
|
|
}
|
|
}
|
|
|
|
bool
|
|
nir_opt_constant_folding(nir_shader *shader)
|
|
{
|
|
struct constant_fold_state state;
|
|
state.has_load_constant = false;
|
|
state.has_indirect_load_const = false;
|
|
|
|
bool progress = nir_shader_lower_instructions(shader, NULL, try_fold_instr,
|
|
&state);
|
|
|
|
/* This doesn't free the constant data if there are no constant loads because
|
|
* the data might still be used but the loads have been lowered to load_ubo
|
|
*/
|
|
if (state.has_load_constant && !state.has_indirect_load_const &&
|
|
shader->constant_data_size) {
|
|
ralloc_free(shader->constant_data);
|
|
shader->constant_data = NULL;
|
|
shader->constant_data_size = 0;
|
|
}
|
|
|
|
return progress;
|
|
}
|