mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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52413a93af
This commit enables NGG culling on all GFX10.3 GPUs by default.
A new debug flag environment variable RADV_DEBUG=nonggc is added to
disable this feature on GPUs where it is enabled by default.
The previous perf test flag RADV_PERFTEST=nggc will not be needed on
GFX10.3 anymore but it can still be used to enable the feature on
GPUs where it isn't on by default.
Totals from 58239 (45.27% of 128647) affected shaders:
VGPRs: 1989752 -> 2049408 (+3.00%); split: -3.21%, +6.21%
SpillSGPRs: 675 -> 883 (+30.81%); split: -78.07%, +108.89%
CodeSize: 72205968 -> 153572764 (+112.69%)
LDS: 0 -> 227125248 (+inf%)
MaxWaves: 1614598 -> 1646934 (+2.00%); split: +3.08%, -1.08%
Instrs: 14202239 -> 29654042 (+108.80%)
Latency: 87986508 -> 136960419 (+55.66%); split: -0.23%, +55.89%
InvThroughput: 14444832 -> 21141875 (+46.36%); split: -0.01%, +46.37%
VClause: 340794 -> 493067 (+44.68%); split: -1.33%, +46.01%
SClause: 520983 -> 738636 (+41.78%); split: -0.25%, +42.03%
Copies: 775639 -> 2787382 (+259.37%)
Branches: 296911 -> 1225431 (+312.73%)
PreSGPRs: 1316896 -> 2057270 (+56.22%); split: -0.14%, +56.36%
PreVGPRs: 1473558 -> 1658432 (+12.55%); split: -1.44%, +13.99%
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13086>
95 lines
3.5 KiB
C
95 lines
3.5 KiB
C
/*
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* Copyright © 2017 Google.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef RADV_DEBUG_H
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#define RADV_DEBUG_H
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#include "radv_private.h"
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/* Please keep docs/envvars.rst up-to-date when you add/remove options. */
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enum {
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RADV_DEBUG_NO_FAST_CLEARS = 1ull << 0,
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RADV_DEBUG_NO_DCC = 1ull << 1,
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RADV_DEBUG_DUMP_SHADERS = 1ull << 2,
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RADV_DEBUG_NO_CACHE = 1ull << 3,
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RADV_DEBUG_DUMP_SHADER_STATS = 1ull << 4,
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RADV_DEBUG_NO_HIZ = 1ull << 5,
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RADV_DEBUG_NO_COMPUTE_QUEUE = 1ull << 6,
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RADV_DEBUG_ALL_BOS = 1ull << 7,
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RADV_DEBUG_NO_IBS = 1ull << 8,
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RADV_DEBUG_DUMP_SPIRV = 1ull << 9,
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RADV_DEBUG_VM_FAULTS = 1ull << 10,
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RADV_DEBUG_ZERO_VRAM = 1ull << 11,
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RADV_DEBUG_SYNC_SHADERS = 1ull << 12,
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RADV_DEBUG_PREOPTIR = 1ull << 13,
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RADV_DEBUG_NO_DYNAMIC_BOUNDS = 1ull << 14,
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RADV_DEBUG_NO_OUT_OF_ORDER = 1ull << 15,
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RADV_DEBUG_INFO = 1ull << 16,
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RADV_DEBUG_STARTUP = 1ull << 17,
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RADV_DEBUG_CHECKIR = 1ull << 18,
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RADV_DEBUG_NOBINNING = 1ull << 19,
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RADV_DEBUG_NO_NGG = 1ull << 20,
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RADV_DEBUG_DUMP_META_SHADERS = 1ull << 21,
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RADV_DEBUG_NO_MEMORY_CACHE = 1ull << 22,
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RADV_DEBUG_DISCARD_TO_DEMOTE = 1ull << 23,
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RADV_DEBUG_LLVM = 1ull << 24,
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RADV_DEBUG_FORCE_COMPRESS = 1ull << 25,
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RADV_DEBUG_HANG = 1ull << 26,
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RADV_DEBUG_IMG = 1ull << 27,
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RADV_DEBUG_NO_UMR = 1ull << 28,
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RADV_DEBUG_INVARIANT_GEOM = 1ull << 29,
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RADV_DEBUG_NO_DISPLAY_DCC = 1ull << 30,
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RADV_DEBUG_NO_TC_COMPAT_CMASK = 1ull << 31,
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RADV_DEBUG_NO_VRS_FLAT_SHADING = 1ull << 32,
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RADV_DEBUG_NO_ATOC_DITHERING = 1ull << 33,
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RADV_DEBUG_NO_NGGC = 1ull << 34,
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};
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enum {
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RADV_PERFTEST_LOCAL_BOS = 1u << 0,
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RADV_PERFTEST_DCC_MSAA = 1u << 1,
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RADV_PERFTEST_BO_LIST = 1u << 2,
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RADV_PERFTEST_CS_WAVE_32 = 1u << 3,
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RADV_PERFTEST_PS_WAVE_32 = 1u << 4,
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RADV_PERFTEST_GE_WAVE_32 = 1u << 5,
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RADV_PERFTEST_NO_SAM = 1u << 6,
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RADV_PERFTEST_SAM = 1u << 7,
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RADV_PERFTEST_RT = 1u << 8,
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RADV_PERFTEST_NGGC = 1u << 9,
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RADV_PERFTEST_FORCE_EMULATE_RT = 1u << 10,
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};
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bool radv_init_trace(struct radv_device *device);
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void radv_finish_trace(struct radv_device *device);
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void radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_cmdbuf *cs);
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void radv_print_spirv(const char *data, uint32_t size, FILE *fp);
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void radv_dump_enabled_options(struct radv_device *device, FILE *f);
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bool radv_trap_handler_init(struct radv_device *device);
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void radv_trap_handler_finish(struct radv_device *device);
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void radv_check_trap_handler(struct radv_queue *queue);
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#endif
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