mesa/src/intel
Ian Romanick 995d993710 i965/vec4: Don't cmod propagate from CMP to ADD if the writemask isn't compatible
Otherwise we can incorrectly cmod propagate in situations like

    add(8)          g10<1>.xD       g2<0>.xD        -16D
    ...
    cmp.ge.f0(8)    null<1>D        g2<0>.xD        16D
    ...
    (+f0) sel(8)    g21<1>.xyUD     g14<4>.xyyyUD   g18<4>.xyyyUD

Sadly, this change hurts quite a few shaders.

v2: Refactor writemask compatibility check into a separate function.
Suggested by Caio.

Ivy Bridge and Haswell had similar results. (Haswell shown)
total instructions in shared programs: 12968489 -> 12968738 (<.01%)
instructions in affected programs: 60679 -> 60928 (0.41%)
helped: 0
HURT: 249
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.22% max: 0.81% x̄: 0.46% x̃: 0.44%
95% mean confidence interval for instructions value: 1.00 1.00
95% mean confidence interval for instructions %-change: 0.44% 0.48%
Instructions are HURT.

total cycles in shared programs: 409171965 -> 409172317 (<.01%)
cycles in affected programs: 260056 -> 260408 (0.14%)
helped: 0
HURT: 176
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.04% max: 0.34% x̄: 0.17% x̃: 0.17%
95% mean confidence interval for cycles value: 2.00 2.00
95% mean confidence interval for cycles %-change: 0.16% 0.18%
Cycles are HURT.

Sandy Bridge
total instructions in shared programs: 10423577 -> 10423753 (<.01%)
instructions in affected programs: 40667 -> 40843 (0.43%)
helped: 0
HURT: 176
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 0.29% max: 0.79% x̄: 0.48% x̃: 0.42%
95% mean confidence interval for instructions value: 1.00 1.00
95% mean confidence interval for instructions %-change: 0.46% 0.51%
Instructions are HURT.

total cycles in shared programs: 146097503 -> 146097855 (<.01%)
cycles in affected programs: 503990 -> 504342 (0.07%)
helped: 0
HURT: 176
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.02% max: 0.36% x̄: 0.12% x̃: 0.11%
95% mean confidence interval for cycles value: 2.00 2.00
95% mean confidence interval for cycles %-change: 0.11% 0.13%
Cycles are HURT.

No changes on any other platforms.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: cd635d149b i965/vec4: Propagate conditional modifiers from compares to adds
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
2018-07-02 19:19:16 -07:00
..
blorp intel/anv,blorp,i965: Implement the SKL 16x MSAA SIMD32 workaround 2018-06-28 13:25:18 -07:00
common intel/common: Add an address de-canonicalization helper 2018-05-31 16:51:45 -07:00
compiler i965/vec4: Don't cmod propagate from CMP to ADD if the writemask isn't compatible 2018-07-02 19:19:16 -07:00
dev i965/glk: Add l3 banks count for 2x6 configuration 2018-05-21 16:43:26 -07:00
genxml intel/genxml: Add bitmasks for CS_DEBUG_MODE2/INSTPM. 2018-06-18 14:41:38 -07:00
isl meson: fix i965/anv/isl genX static lib names 2018-06-18 12:03:24 +01:00
tools intel/aubinator: drop unused functions 2018-06-20 15:17:26 +01:00
vulkan anv: Add support for the on-disk shader cache 2018-07-02 14:52:05 -07:00
Android.blorp.mk intel: android: remove libdrm_intel requirement 2017-03-30 19:07:23 +01:00
Android.common.mk android: link libmesa_intel_common with zlib and expat 2017-08-02 10:30:50 +03:00
Android.compiler.mk android: fix build issues with brw_nir_trig_workarounds.c 2017-10-04 07:39:05 +03:00
Android.dev.mk android: Use local i915_drm.h rather than the system one. 2018-03-23 10:05:02 -07:00
Android.genxml.mk intel/genxml/icl: Generate packing headers 2018-02-15 16:14:55 -08:00
Android.isl.mk intel/isl/icl: Build and use gen11 surface state emit functions 2018-02-15 16:14:55 -08:00
Android.mk intel: Add missing includes for building on Android 2018-03-06 00:14:22 -08:00
Android.vulkan.mk vulkan: Drop vk_android_native_buffer.xml 2018-04-10 19:29:49 -07:00
Makefile.am intel/tools: add intel_sanitize_gpu to EXTRA_DIST 2018-06-05 10:32:35 -07:00
Makefile.blorp.am blorp: automake: add TODO to the tarball 2017-02-24 17:37:00 +00:00
Makefile.common.am automake: intel: correctly append to the LIBADD variable 2017-11-08 14:23:57 +00:00
Makefile.compiler.am intel/isl: Add format conversion code 2018-05-09 11:16:33 -07:00
Makefile.dev.am intel: Split gen_device_info out into libintel_dev 2018-03-05 09:47:37 -08:00
Makefile.genxml.am intel: genxml: automake: include gen_bits_header.py in the tarball 2017-04-05 13:16:28 +01:00
Makefile.isl.am intel/isl: Add format conversion code 2018-05-09 11:16:33 -07:00
Makefile.sources anv: Add KHR_display extension to anv [v7] 2018-06-19 14:17:46 -07:00
Makefile.tools.am intel: Move batch decoder/disassembler from tools/ to common/ 2018-05-02 09:27:56 -07:00
Makefile.vulkan.am vulkan: EXT_acquire_xlib_display requires libXrandr headers to build 2018-06-20 10:42:05 -07:00
meson.build intel/common: Use isl for decoder surface formats 2018-03-05 09:51:04 -08:00