Lionel Landwerlin c478b6355a anv/blorp/iris: rework Wa_14025112257 ... Drivers already have to track this workaround, so remove the logic from Blorp and let the driver manage this. Also in Anv don't accumulate this workaround, emit it directly in place right after COMPUTE_WALKER. Accumulating can be problematic when you want to dispatch concurrent compute shaders that do not need any cache flush interaction (typical example with the internal simple_shader framework). Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Fixes: 3e0ad0176b ("anv: Emit state cache invalidation after every compute dispatch") Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com> Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38306>		2025-11-10 08:57:06 +00:00
..
blorp.c	build: avoid redefining unreachable() which is standard in C23	2025-07-31 17:49:42 +00:00
blorp.h	anv/blorp: add missing cs stall on compute pipe control	2025-10-08 04:49:27 +00:00
blorp_blit.c	intel/blorp: add restriction for gfx12	2025-10-08 04:26:46 +00:00
blorp_brw.c	brw: Move into a new src/intel/compiler/brw subdirectory	2025-10-09 07:01:47 +00:00
blorp_clear.c	brw/blorp: lower MCS fetching in NIR	2025-09-23 15:37:40 +00:00
blorp_elk.c	blorp: Fix potential read of uninitaized elk fields in debug paths	2025-09-10 17:51:34 +00:00
blorp_genX_exec_brw.h	anv/blorp/iris: rework Wa_14025112257	2025-11-10 08:57:06 +00:00
blorp_genX_exec_elk.h	intel: move deref_block_size to intel_urb_config	2025-08-01 11:35:05 +00:00
blorp_nir_builder.h	brw/blorp: lower MCS fetching in NIR	2025-09-23 15:37:40 +00:00
blorp_priv.h	intel: use util_is_aligned more	2025-10-31 15:03:58 +00:00
meson.build	brw: Move into a new src/intel/compiler/brw subdirectory	2025-10-09 07:01:47 +00:00