ir3: don't use VS input regs for binning variant
This isn't necessary anymore since f6f7bc29 ("freedreno/a6xx: Program
VFD_DEST_CNTL from program stateobj").
Allowing the binning variant to allocate its own inputs ensures we don't
needlessly use high register numbers (and thus potentially have a larger
register footprint). Unfortunately, this doesn't have an impact on waves
on shaderdb/fossildb.
Totals from 14669 (8.91% of 164575) affected shaders:
Instrs: 3026564 -> 3024820 (-0.06%); split: -0.33%, +0.28%
CodeSize: 6499538 -> 6496888 (-0.04%); split: -0.19%, +0.15%
NOPs: 452142 -> 451590 (-0.12%); split: -1.76%, +1.64%
MOVs: 67614 -> 66477 (-1.68%); split: -4.92%, +3.24%
Full: 149240 -> 155922 (+4.48%); split: -0.76%, +5.24%
(ss): 56452 -> 56247 (-0.36%); split: -4.58%, +4.22%
(sy): 33366 -> 33535 (+0.51%); split: -2.82%, +3.33%
(ss)-stall: 213221 -> 213992 (+0.36%); split: -0.87%, +1.23%
(sy)-stall: 1391221 -> 1395187 (+0.29%); split: -4.05%, +4.34%
Preamble Instrs: 695820 -> 695661 (-0.02%); split: -0.04%, +0.02%
Cat0: 495109 -> 494450 (-0.13%); split: -1.65%, +1.52%
Cat1: 127072 -> 125925 (-0.90%); split: -2.61%, +1.71%
Cat7: 94725 -> 94787 (+0.07%); split: -0.08%, +0.15%
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34651>
656d7a0f88