mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
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Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Georg Lehmann <dadschoorse@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26251>
274 lines
8.6 KiB
C++
274 lines
8.6 KiB
C++
/*
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* Copyright © 2018 Intel Corporation
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* Copyright © 2021 Valve Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include "nir_test.h"
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namespace {
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class algebraic_test_base : public nir_test {
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protected:
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algebraic_test_base();
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virtual void run_pass()=0;
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void test_op(nir_op op, nir_def *src0, nir_def *src1, nir_def *src2,
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nir_def *src3, const char *desc);
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void test_2src_op(nir_op op, int64_t src0, int64_t src1);
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void require_one_alu(nir_op op);
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nir_variable *res_var;
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};
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algebraic_test_base::algebraic_test_base()
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: nir_test::nir_test("nir_opt_algebraic_test")
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{
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res_var = nir_local_variable_create(b->impl, glsl_int_type(), "res");
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}
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void algebraic_test_base::test_op(nir_op op, nir_def *src0, nir_def *src1,
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nir_def *src2, nir_def *src3, const char *desc)
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{
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nir_def *res_deref = &nir_build_deref_var(b, res_var)->def;
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/* create optimized expression */
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nir_intrinsic_instr *optimized_instr = nir_build_store_deref(
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b, res_deref, nir_build_alu(b, op, src0, src1, src2, src3), 0x1);
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run_pass();
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b->cursor = nir_after_cf_list(&b->impl->body);
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/* create reference expression */
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nir_intrinsic_instr *ref_instr = nir_build_store_deref(
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b, res_deref, nir_build_alu(b, op, src0, src1, src2, src3), 0x1);
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/* test equality */
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nir_opt_constant_folding(b->shader);
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ASSERT_TRUE(nir_src_is_const(ref_instr->src[1]));
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ASSERT_TRUE(nir_src_is_const(optimized_instr->src[1]));
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int32_t ref = nir_src_as_int(ref_instr->src[1]);
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int32_t optimized = nir_src_as_int(optimized_instr->src[1]);
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EXPECT_EQ(ref, optimized) << "Test input: " << desc;
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/* reset shader */
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exec_list_make_empty(&nir_start_block(b->impl)->instr_list);
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b->cursor = nir_after_cf_list(&b->impl->body);
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}
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void algebraic_test_base::test_2src_op(nir_op op, int64_t src0, int64_t src1)
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{
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char desc[128];
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snprintf(desc, sizeof(desc), "%s(%" PRId64 ", %" PRId64 ")", nir_op_infos[op].name, src0, src1);
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test_op(op, nir_imm_int(b, src0), nir_imm_int(b, src1), NULL, NULL, desc);
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}
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void algebraic_test_base::require_one_alu(nir_op op)
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{
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unsigned count = 0;
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nir_foreach_instr(instr, nir_start_block(b->impl)) {
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if (instr->type == nir_instr_type_alu) {
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ASSERT_TRUE(nir_instr_as_alu(instr)->op == op);
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ASSERT_EQ(count, 0);
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count++;
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}
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}
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}
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class nir_opt_algebraic_test : public algebraic_test_base {
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protected:
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virtual void run_pass() {
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nir_opt_algebraic(b->shader);
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}
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};
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class nir_opt_idiv_const_test : public algebraic_test_base {
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protected:
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virtual void run_pass() {
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nir_opt_idiv_const(b->shader, 8);
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}
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};
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class nir_opt_mqsad_test : public algebraic_test_base {
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protected:
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virtual void run_pass() {
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nir_opt_mqsad(b->shader);
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}
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};
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TEST_F(nir_opt_algebraic_test, umod_pow2_src2)
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{
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for (int i = 0; i <= 9; i++)
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test_2src_op(nir_op_umod, i, 4);
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test_2src_op(nir_op_umod, UINT32_MAX, 4);
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}
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TEST_F(nir_opt_algebraic_test, imod_pow2_src2)
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{
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for (int i = -9; i <= 9; i++) {
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test_2src_op(nir_op_imod, i, 4);
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test_2src_op(nir_op_imod, i, -4);
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test_2src_op(nir_op_imod, i, INT32_MIN);
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}
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test_2src_op(nir_op_imod, INT32_MAX, 4);
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test_2src_op(nir_op_imod, INT32_MAX, -4);
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test_2src_op(nir_op_imod, INT32_MIN, 4);
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test_2src_op(nir_op_imod, INT32_MIN, -4);
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test_2src_op(nir_op_imod, INT32_MIN, INT32_MIN);
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}
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TEST_F(nir_opt_algebraic_test, irem_pow2_src2)
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{
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for (int i = -9; i <= 9; i++) {
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test_2src_op(nir_op_irem, i, 4);
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test_2src_op(nir_op_irem, i, -4);
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}
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test_2src_op(nir_op_irem, INT32_MAX, 4);
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test_2src_op(nir_op_irem, INT32_MAX, -4);
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test_2src_op(nir_op_irem, INT32_MIN, 4);
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test_2src_op(nir_op_irem, INT32_MIN, -4);
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}
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TEST_F(nir_opt_algebraic_test, msad)
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{
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options.lower_bitfield_extract = true;
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options.has_bfe = true;
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options.has_msad = true;
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nir_def *src0 = nir_load_var(b, nir_local_variable_create(b->impl, glsl_int_type(), "src0"));
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nir_def *src1 = nir_load_var(b, nir_local_variable_create(b->impl, glsl_int_type(), "src1"));
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/* This mimics the sequence created by vkd3d-proton. */
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nir_def *res = NULL;
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for (unsigned i = 0; i < 4; i++) {
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nir_def *ref = nir_ubitfield_extract(b, src0, nir_imm_int(b, i * 8), nir_imm_int(b, 8));
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nir_def *src = nir_ubitfield_extract(b, src1, nir_imm_int(b, i * 8), nir_imm_int(b, 8));
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nir_def *is_ref_zero = nir_ieq_imm(b, ref, 0);
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nir_def *abs_diff = nir_iabs(b, nir_isub(b, ref, src));
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nir_def *masked_diff = nir_bcsel(b, is_ref_zero, nir_imm_int(b, 0), abs_diff);
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if (res)
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res = nir_iadd(b, res, masked_diff);
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else
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res = masked_diff;
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}
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nir_store_var(b, res_var, res, 0x1);
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while (nir_opt_algebraic(b->shader)) {
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nir_opt_constant_folding(b->shader);
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nir_opt_dce(b->shader);
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}
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require_one_alu(nir_op_msad_4x8);
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}
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TEST_F(nir_opt_mqsad_test, mqsad)
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{
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options.lower_bitfield_extract = true;
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options.has_bfe = true;
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options.has_msad = true;
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options.has_shfr32 = true;
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nir_def *ref = nir_load_var(b, nir_local_variable_create(b->impl, glsl_int_type(), "ref"));
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nir_def *src = nir_load_var(b, nir_local_variable_create(b->impl, glsl_ivec_type(2), "src"));
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nir_def *accum = nir_load_var(b, nir_local_variable_create(b->impl, glsl_ivec_type(4), "accum"));
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nir_def *srcx = nir_channel(b, src, 0);
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nir_def *srcy = nir_channel(b, src, 1);
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nir_def *res[4];
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for (unsigned i = 0; i < 4; i++) {
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nir_def *src1 = srcx;
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switch (i) {
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case 0:
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break;
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case 1:
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src1 = nir_bitfield_select(b, nir_imm_int(b, 0xff000000), nir_ishl_imm(b, srcy, 24),
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nir_ushr_imm(b, srcx, 8));
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break;
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case 2:
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src1 = nir_bitfield_select(b, nir_imm_int(b, 0xffff0000), nir_ishl_imm(b, srcy, 16),
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nir_extract_u16(b, srcx, nir_imm_int(b, 1)));
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break;
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case 3:
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src1 = nir_bitfield_select(b, nir_imm_int(b, 0xffffff00), nir_ishl_imm(b, srcy, 8),
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nir_extract_u8_imm(b, srcx, 3));
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break;
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}
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res[i] = nir_msad_4x8(b, ref, src1, nir_channel(b, accum, i));
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}
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nir_store_var(b, nir_local_variable_create(b->impl, glsl_ivec_type(4), "res"), nir_vec(b, res, 4), 0xf);
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while (nir_opt_algebraic(b->shader)) {
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nir_opt_constant_folding(b->shader);
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nir_opt_dce(b->shader);
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}
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ASSERT_TRUE(nir_opt_mqsad(b->shader));
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nir_copy_prop(b->shader);
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nir_opt_dce(b->shader);
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require_one_alu(nir_op_mqsad_4x8);
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}
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TEST_F(nir_opt_idiv_const_test, umod)
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{
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for (uint32_t d : {16u, 17u, 0u, UINT32_MAX}) {
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for (int i = 0; i <= 40; i++)
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test_2src_op(nir_op_umod, i, d);
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for (int i = 0; i < 20; i++)
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test_2src_op(nir_op_umod, UINT32_MAX - i, d);
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}
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}
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TEST_F(nir_opt_idiv_const_test, imod)
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{
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for (int32_t d : {16, -16, 17, -17, 0, INT32_MIN, INT32_MAX}) {
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for (int i = -40; i <= 40; i++)
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test_2src_op(nir_op_imod, i, d);
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for (int i = 0; i < 20; i++)
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test_2src_op(nir_op_imod, INT32_MIN + i, d);
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for (int i = 0; i < 20; i++)
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test_2src_op(nir_op_imod, INT32_MAX - i, d);
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}
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}
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TEST_F(nir_opt_idiv_const_test, irem)
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{
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for (int32_t d : {16, -16, 17, -17, 0, INT32_MIN, INT32_MAX}) {
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for (int i = -40; i <= 40; i++)
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test_2src_op(nir_op_irem, i, d);
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for (int i = 0; i < 20; i++)
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test_2src_op(nir_op_irem, INT32_MIN + i, d);
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for (int i = 0; i < 20; i++)
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test_2src_op(nir_op_irem, INT32_MAX - i, d);
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}
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}
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}
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