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53440554c4
In iris, use the CCS scale down factor to calculate the impact of CCS on TBIMR tile sizes. Even though we fall back to a seemingly less accurate method to calculate the impact of CCS, it ends up giving the same answer, 1bpp. Anv already uses this factor, so this patch replaces the constant with this macro. There are two benefits to doing this: 1) Consistency between anv and iris. 2) Preparation for a future where we no longer use ISL surfaces to describe CCS on Xe+. In fact, in iris, we already don't create such surfaces on ACM. I considered using INTEL_AUX_MAP_MAIN_SIZE_SCALEDOWN for the calculation in both drivers, but the naming is aux-map specific and the scaledown actually exists on flat-ccs platforms as well. So, we introduce a new macro for all Xe platforms, currently only used for the specific use case of TBIMR calculations. We can add more such macros for future platforms, as needed. Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Rohan Garg <rohan.garg@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28942> |
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