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The GL_ARB_shader_ballot spec says that gl_SubGroupSizeARB is declared as a uniform. This means that it cannot change across an invocation such as a draw call or a compute dispatch. For compute shaders, we're ok because we only ever use one dispatch size. For fragment, however, the hardware dynamically chooses between SIMD8 and SIMD16 which violates the spec. Instead, let's just pick a subgroup size based on the shader stage. The fixed size we choose for compute shaders is a bit higher than strictly needed but there's no real harm in that. The advantage is that, if they do anything interesting with the value, NIR will see it as an immediate and can optimize better. Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
244 lines
8.2 KiB
C
244 lines
8.2 KiB
C
/*
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* Copyright © 2017 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include "nir.h"
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#include "nir_builder.h"
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/**
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* \file nir_opt_intrinsics.c
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*/
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/* Converts a uint32_t or uint64_t value to uint64_t or uvec4 */
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static nir_ssa_def *
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uint_to_ballot_type(nir_builder *b, nir_ssa_def *value,
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unsigned num_components, unsigned bit_size)
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{
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assert(value->num_components == 1);
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assert(value->bit_size == 32 || value->bit_size == 64);
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nir_ssa_def *zero = nir_imm_int(b, 0);
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if (num_components > 1) {
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/* SPIR-V uses a uvec4 for ballot values */
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assert(num_components == 4);
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assert(bit_size == 32);
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if (value->bit_size == 32) {
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return nir_vec4(b, value, zero, zero, zero);
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} else {
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assert(value->bit_size == 64);
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return nir_vec4(b, nir_unpack_64_2x32_split_x(b, value),
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nir_unpack_64_2x32_split_y(b, value),
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zero, zero);
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}
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} else {
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/* GLSL uses a uint64_t for ballot values */
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assert(num_components == 1);
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assert(bit_size == 64);
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if (value->bit_size == 32) {
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return nir_pack_64_2x32_split(b, value, zero);
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} else {
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assert(value->bit_size == 64);
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return value;
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}
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}
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}
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static nir_ssa_def *
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lower_read_invocation_to_scalar(nir_builder *b, nir_intrinsic_instr *intrin)
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{
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/* This is safe to call on scalar things but it would be silly */
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assert(intrin->dest.ssa.num_components > 1);
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nir_ssa_def *value = nir_ssa_for_src(b, intrin->src[0],
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intrin->num_components);
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nir_ssa_def *reads[4];
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for (unsigned i = 0; i < intrin->num_components; i++) {
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nir_intrinsic_instr *chan_intrin =
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nir_intrinsic_instr_create(b->shader, intrin->intrinsic);
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nir_ssa_dest_init(&chan_intrin->instr, &chan_intrin->dest,
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1, intrin->dest.ssa.bit_size, NULL);
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chan_intrin->num_components = 1;
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/* value */
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chan_intrin->src[0] = nir_src_for_ssa(nir_channel(b, value, i));
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/* invocation */
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if (intrin->intrinsic == nir_intrinsic_read_invocation)
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nir_src_copy(&chan_intrin->src[1], &intrin->src[1], chan_intrin);
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nir_builder_instr_insert(b, &chan_intrin->instr);
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reads[i] = &chan_intrin->dest.ssa;
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}
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return nir_vec(b, reads, intrin->num_components);
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}
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static nir_ssa_def *
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lower_subgroups_intrin(nir_builder *b, nir_intrinsic_instr *intrin,
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const nir_lower_subgroups_options *options)
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{
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switch (intrin->intrinsic) {
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case nir_intrinsic_vote_any:
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case nir_intrinsic_vote_all:
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if (options->lower_vote_trivial)
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return nir_ssa_for_src(b, intrin->src[0], 1);
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break;
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case nir_intrinsic_vote_eq:
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if (options->lower_vote_trivial)
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return nir_imm_int(b, NIR_TRUE);
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break;
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case nir_intrinsic_load_subgroup_size:
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if (options->subgroup_size)
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return nir_imm_int(b, options->subgroup_size);
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break;
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case nir_intrinsic_read_invocation:
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case nir_intrinsic_read_first_invocation:
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if (options->lower_to_scalar && intrin->num_components > 1)
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return lower_read_invocation_to_scalar(b, intrin);
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break;
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case nir_intrinsic_load_subgroup_eq_mask:
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case nir_intrinsic_load_subgroup_ge_mask:
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case nir_intrinsic_load_subgroup_gt_mask:
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case nir_intrinsic_load_subgroup_le_mask:
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case nir_intrinsic_load_subgroup_lt_mask: {
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if (!options->lower_subgroup_masks)
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return NULL;
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/* If either the result or the requested bit size is 64-bits then we
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* know that we have 64-bit types and using them will probably be more
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* efficient than messing around with 32-bit shifts and packing.
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*/
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const unsigned bit_size = MAX2(options->ballot_bit_size,
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intrin->dest.ssa.bit_size);
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assert(options->subgroup_size <= 64);
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uint64_t group_mask = ~0ull >> (64 - options->subgroup_size);
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nir_ssa_def *count = nir_load_subgroup_invocation(b);
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nir_ssa_def *val;
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switch (intrin->intrinsic) {
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case nir_intrinsic_load_subgroup_eq_mask:
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val = nir_ishl(b, nir_imm_intN_t(b, 1ull, bit_size), count);
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break;
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case nir_intrinsic_load_subgroup_ge_mask:
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val = nir_iand(b, nir_ishl(b, nir_imm_intN_t(b, ~0ull, bit_size), count),
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nir_imm_intN_t(b, group_mask, bit_size));
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break;
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case nir_intrinsic_load_subgroup_gt_mask:
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val = nir_iand(b, nir_ishl(b, nir_imm_intN_t(b, ~1ull, bit_size), count),
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nir_imm_intN_t(b, group_mask, bit_size));
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break;
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case nir_intrinsic_load_subgroup_le_mask:
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val = nir_inot(b, nir_ishl(b, nir_imm_intN_t(b, ~1ull, bit_size), count));
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break;
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case nir_intrinsic_load_subgroup_lt_mask:
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val = nir_inot(b, nir_ishl(b, nir_imm_intN_t(b, ~0ull, bit_size), count));
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break;
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default:
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unreachable("you seriously can't tell this is unreachable?");
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}
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return uint_to_ballot_type(b, val,
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intrin->dest.ssa.num_components,
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intrin->dest.ssa.bit_size);
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}
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case nir_intrinsic_ballot: {
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if (intrin->dest.ssa.num_components == 1 &&
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intrin->dest.ssa.bit_size == options->ballot_bit_size)
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return NULL;
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nir_intrinsic_instr *ballot =
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nir_intrinsic_instr_create(b->shader, nir_intrinsic_ballot);
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ballot->num_components = 1;
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nir_ssa_dest_init(&ballot->instr, &ballot->dest,
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1, options->ballot_bit_size, NULL);
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nir_src_copy(&ballot->src[0], &intrin->src[0], ballot);
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nir_builder_instr_insert(b, &ballot->instr);
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return uint_to_ballot_type(b, &ballot->dest.ssa,
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intrin->dest.ssa.num_components,
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intrin->dest.ssa.bit_size);
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}
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default:
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break;
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}
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return NULL;
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}
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static bool
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lower_subgroups_impl(nir_function_impl *impl,
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const nir_lower_subgroups_options *options)
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{
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nir_builder b;
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nir_builder_init(&b, impl);
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bool progress = false;
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nir_foreach_block(block, impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type != nir_instr_type_intrinsic)
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continue;
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nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
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b.cursor = nir_before_instr(instr);
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nir_ssa_def *lower = lower_subgroups_intrin(&b, intrin, options);
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if (!lower)
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continue;
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nir_ssa_def_rewrite_uses(&intrin->dest.ssa, nir_src_for_ssa(lower));
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nir_instr_remove(instr);
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progress = true;
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}
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}
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return progress;
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}
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bool
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nir_lower_subgroups(nir_shader *shader,
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const nir_lower_subgroups_options *options)
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{
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bool progress = false;
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nir_foreach_function(function, shader) {
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if (!function->impl)
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continue;
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if (lower_subgroups_impl(function->impl, options)) {
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progress = true;
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nir_metadata_preserve(function->impl, nir_metadata_block_index |
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nir_metadata_dominance);
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}
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}
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return progress;
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}
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